Stacked DRAM Capacitor Structure With Sloped Electrodes and Support Layer
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Solution Overview
Problem
As memory cells in DRAM devices are arranged in higher density, the shrinking spaces between stacked capacitors pose challenges for manufacturing, affecting device quality and stability.
Innovation Solution
The semiconductor structure features bottom electrodes with slop profiles and an upper supporting layer that extends laterally between them, allowing for improved film quality of the capacitor dielectric and conductive material within a cavity, enhancing capacitor reliability and consistency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory cells are arranged in higher density with stacked capacitors, then array density is improved, but manufacturing precision deteriorates due to shrunk spaces between capacitors
Solution Approach 1:
The capacitor structure is segmented into multiple parts: bottom electrode, upper supporting layer, cavity, capacitor dielectric layer, and top electrode. This segmentation allows each component to be optimized independently, enabling high density arrangement while maintaining manufacturing precision through controlled formation of each segment.
Solution Approach 2:
The patent transitions from planar capacitor arrangement to three-dimensional stacked capacitor structure. By utilizing vertical stacking with bottom electrodes extending into substrates and upper supporting layers providing lateral support, the design achieves higher array density while maintaining adequate manufacturing spaces through vertical rather than horizontal expansion.
2Productivity
If spaces between stacked capacitors are shrunk to increase density, then array density is improved, but device stability deteriorates
Solution Approach 1:
The upper supporting layer is positioned between adjacent bottom electrodes at a height where it can provide lateral support before the capacitors are fully formed. This pre-positioned supporting structure acts as a cushion that prevents deformation and maintains stability even when spaces between capacitors are shrunk for high density arrangement.
Solution Approach 2:
The capacitor structure combines multiple materials with different properties: conductive materials for electrodes, dielectric materials for capacitor dielectric layers, and supporting layer materials providing mechanical strength. This composite structure enhances overall device stability while allowing compact spacing between capacitors.
Data Source
AI summary
A semiconductor structure includes a substrate having first and second bottom electrodes disposed thereon. The first bottom electrode includes a first sidewall and a second sidewall. An upper portion of the first sidewall comprises a slope profile. The second bottom electrode includes a third sidewall and a fourth sidewall. The second sidewall is opposite to the third sidewall. An upper supporting layer extends laterally between and the first bottom electrode and the second bottom electrode and directly contacts the second sidewall and the third sidewall. A lower end of the slope profile is not lower than a lower surface of the upper supporting layer. A cavity extends laterally between the substrate and the upper supporting layer. A capacitor dielectric layer is formed along the first bottom electrode and the second bottom electrode. A conductive material is formed on the capacitor dielectric layer and fills the cavity.