Signal Sampling Circuit for DRAM Command Pulse Decoding
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Solution Overview
Problem
In Dynamic Random Access Memory (DRAM) chips, the existing instruction decoding solutions often confuse 2T CMD and NT ODT CMD signals due to their different pulse widths, leading to decoding errors.
Innovation Solution
A signal sampling circuit is introduced, comprising a signal input circuit, a first instruction sampling circuit, a second instruction sampling circuit, and an instruction decoding circuit, which determines and processes chip select signals to generate distinct chip select clock signals for accurate decoding of 2T CMD and NT ODT CMD instructions based on their pulse widths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single instruction decoding solution is used for both 2T CMD and NT ODT CMD signals, then the device complexity is reduced, but decoding errors occur due to confusion between the two signal types with different pulse widths
Solution Approach 1:
The patent divides the instruction decoding function into separate processing paths: a first instruction sampling circuit for 2T CMD signals and a second instruction sampling circuit for NT ODT CMD signals. Each sampling circuit is dedicated to handling signals with specific pulse width characteristics, preventing confusion between the two signal types while maintaining overall system functionality.
2Reliability
If separate sampling circuits are used for 2T CMD and NT ODT CMD signals, then decoding accuracy is improved, but the device complexity increases
Solution Approach 1:
The patent implements local quality by configuring different sampling circuits with specific characteristics matched to their intended signal types. The first instruction sampling circuit is optimized for 2T CMD signals while the second is optimized for NT ODT CMD signals, allowing each component to have the precise properties needed for its specific function rather than requiring a universal design.
3Measurement precision
If the pulse widths of chip select signals are made different for 2T CMD and NT ODT CMD, then signal distinction is enabled, but the ease of operation decreases due to additional processing requirements
Solution Approach 1:
The patent performs preliminary action by using the pulse width difference of chip select signals to pre-identify and route signals to appropriate sampling circuits before decoding begins. This early differentiation based on temporal characteristics allows the system to automatically select the correct processing path without requiring complex real-time analysis during the decoding operation itself.
Data Source
AI summary
A signal sampling circuit includes the following: a signal input circuit, configured to determine a to-be-processed instruction signal and a to-be-processed chip select signal; a first instruction sampling circuit, configured to perform two-stage sampling and logic operation processing on the to-be-processed chip select signal according to a first clock signal to obtain a first chip select clock signal; a second instruction sampling circuit, configured to perform two-stage sampling and logic operation processing on the to-be-processed chip select signal according to the first clock signal to obtain a second chip select clock signal; and an instruction decoding circuit, configured to perform decoding and sampling processing on the to-be-processed instruction signal according to be to-be-processed chip select signal and one of the first chip select clock signal and the second chip select clock signal to obtain a target instruction signal.