DRAM Cu-Pad Redundancy for Hybrid Bonding Yield Loss
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Solution Overview
Problem
Dynamic random access memory devices with a cell-on-peri (CoP) structure face yield loss due to contact defects between copper pads during hybrid copper bonding, rendering word lines or bit lines unusable.
Innovation Solution
A memory device design with enhanced bonding pad configurations, including multiple bonding pads per word line and bit line, and a chip-to-chip structure with a logic chip connected to the cell chip through Cu-Cu bonding and dielectric-dielectric bonding, ensuring reliable electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hybrid copper bonding is used to connect cell wafer to logic wafer, then electrical connection between word line/bit line and driver/sense amplifier is achieved, but contact defects occur between Cu-PADs resulting in yield decrease
Solution Approach 1:
The bonding pad connection is segmented into multiple redundant paths. Each word line and bit line is connected to the logic chip through multiple separate Cu-PADs instead of a single connection point, so that if one bonding interface fails, alternative paths remain functional.
Solution Approach 2:
Redundant bonding pads are prepared in advance to compensate for potential bonding defects. The design includes extra Cu-PADs that serve as backup connection paths, cushioning against the harmful effect of contact defects before they can impact yield.
2Reliability
If multiple bonding pads are used per word line and bit line, then redundancy against contact defects is increased, but device complexity increases
Solution Approach 1:
The bonding pad structure is designed with multi-functionality where each bonding pad region serves both as a primary connection point and as a potential backup path. The Cu-PADs are configured to handle multiple functions: normal signal transmission and defect compensation, reducing the need for entirely separate redundant systems.
Solution Approach 2:
Multiple bonding pads for the same word line or bit line are merged into a coordinated system where they work together as a unified redundant connection structure. The pads are positioned and configured to share common functionality, reducing overall system complexity compared to fully independent redundant paths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves yield and reliability by minimizing the impact of contact defects, enabling efficient data writing and reading operations.
Implementation Method 1
A dynamic random access memory device (DRAM) with a cell-on-peri (CoP) structure may bond an upper wafer including memory cells to a lower wafer including peripheral logic in a hybrid Copper Bonding (HCB) method
Data Source
AI summary
A memory device comprises a cell chip including a memory cell array having a plurality of first lines and a plurality of second lines, first and second bonding pads adjacent to each other in a first region and electrically connected to the plurality of first lines, and third and fourth bonding pads adjacent to each other in a second region different from the first region and electrically connected to the plurality of second lines, and a logic chip electrically connected to the first, second, third, and fourth bonding pads of the cell chip. The first and second bonding pads are electrically connected to a third line among the plurality of first lines, and the third and fourth bonding pads are electrically connected to fourth and fifth lines among the plurality of second lines, respectively.