Differential Voltage Coding in DRAM for Longer Refresh Intervals
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Solution Overview
Problem
Dynamic Random Access Memory (DRAM) faces challenges in storage density and energy consumption due to the need for frequent refresh operations to maintain data integrity, as capacitors used in DRAM cells leak charge over time, requiring short refresh intervals and increased energy expenditure.
Innovation Solution
The implementation of a voltage code storage system that encodes n bits of data into k bits, allowing for storage in a codeword with k cells, where n>k, using a voltage code with a code rate of n/k, enabling longer refresh intervals without data loss, as the voltage code is invariant to common leakage rates and does not require an external reference for reading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional DRAM storage is used with capacitors to store data, then data can be stored in each cell, but the capacitors leak charge over time requiring frequent refresh operations
Solution Approach 1:
The patent changes the fundamental parameter of data representation from voltage levels (0V for 0, Vdd for 1) to differential voltage offsets (±Voffset). This parameter change allows the stored signal to remain valid even as capacitors leak charge, because the differential nature preserves the relative voltage difference between complementary storage elements, thereby reducing refresh frequency and energy consumption while maintaining data integrity
Solution Approach 2:
Instead of storing a single voltage level that degrades over time, the patent inverts the approach by storing complementary signals (Q and Q̄) where both elements degrade similarly. The data is recovered by comparing the differential difference, which remains stable despite individual capacitor leakage. This inversion transforms a reliability problem into a stable differential measurement
2Reliability
If capacitors are used to store data in DRAM cells, then data can be stored, but short refresh intervals are required to prevent data loss
Solution Approach 1:
The patent changes the storage parameter from absolute voltage levels to differential voltage differences. By storing complementary signals and retrieving data through differential comparison, the system becomes insensitive to uniform charge leakage over time, extending the valid storage duration and allowing longer refresh intervals without compromising data retention
Solution Approach 2:
The patent converts the harmful effect of capacitor leakage into a benefit by using differential storage. Since both complementary capacitors leak at similar rates, the differential difference remains stable, transforming the leakage problem into a feature that enables longer data retention and less frequent refresh operations
3Quantity of substance
If voltage code storage with n>k is implemented, then memory density is enhanced, but the encoding and decoding complexity increases
Solution Approach 1:
The patent segments the storage system into distinct functional blocks: encoder circuitry that converts n-bit data into k-bit differential codes, storage cells for holding the coded data, and decoder circuitry that reconstructs the original data. This segmentation allows each component to be optimized independently, managing the complexity of encoding/decoding while achieving enhanced memory density through the n>k code rate
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances memory density and relaxes refresh considerations, allowing for longer refresh intervals and reduced energy consumption by eliminating the need for external references during read operations, thereby improving the overall performance and efficiency of DRAM.
Implementation Method 1
each data cell comprises one transistor and one capacitor... the capacitor is charged to one of two signal levels
Implementation Method 2
the charge is maintained until power is removed or the charge is changed during a write operation
Data Source
AI summary
A storage device stores data in groups of memory cells using vectors corresponding to voltage code codewords, each codeword having k entries. Entries have values selected from a set of at least three entry values and 2n distinct inputs can be encoded into k-entry codewords for some n>k. A vector storage element comprising k cells can store an k electrical quantities (voltage, current, etc.) corresponding to a codeword. The voltage code is such that, for at least one position of a vector, there are at least three vectors having distinct entry values at that position and, for at least a subset of the possible codewords, the sum of the entry values over the positions of each vector is constant from vector to vector in that subset. The storage device might be an integrated circuit device, a discrete memory device, or a device having embedded memory.