DRAM Dummy Read Error Correction for Lower Bit Error Rates
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Solution Overview
Problem
Increased memory density in DRAM systems leads to intermittent failures due to high bit error rates, which can be costly in terms of latency and ECC overhead, particularly in applications like autonomous driving systems.
Innovation Solution
Implementing a controller that performs dummy reads on memory data, error-corrects it, and writes the corrected data back to the array, maintaining error rates below a threshold to reduce the need for redundant memory and minimize ECC overhead, while maintaining system speed and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction code (ECC) component is used to detect and correct errors, then reliability is improved, but latency increases and ECC overhead increases
Solution Approach 1:
The patent performs dummy reads and error corrections in advance before actual data access is needed. By proactively reading data, correcting errors, and writing back corrected data during idle periods or before anticipated access, the system prepares data in advance, reducing latency when actual read operations occur while maintaining reliability through error correction.
Solution Approach 2:
The patent implements periodic dummy reads at predetermined intervals to proactively detect and correct errors before they affect actual data access. This periodic maintenance approach ensures data integrity is maintained over time while allowing the system to operate at full speed during normal operations without continuous error correction overhead.
2Reliability
If error correction code (ECC) component is used to detect and correct errors, then reliability is improved, but ECC overhead increases
Solution Approach 1:
The patent performs error correction on selected portions of data through dummy reads rather than continuously correcting all data. By selectively applying error correction to specific memory regions or data portions based on need, the system maintains reliability where necessary while reducing overall ECC overhead and complexity compared to comprehensive continuous error correction.
Solution Approach 2:
The system performs self-service error correction by automatically detecting errors through dummy reads and correcting them without external intervention. This autonomous error management reduces the need for complex external error correction mechanisms and minimizes ECC overhead while maintaining data integrity.
3Productivity
If memory density is increased, then productivity is improved, but bit error rate increases causing intermittent failures
Solution Approach 1:
The patent applies preliminary error detection and correction through dummy reads on high-density memory structures. By proactively identifying and correcting errors in densely packed memory cells before they cause failures, the system maintains the productivity benefits of high memory density while mitigating the increased bit error rate through advance error management.
Solution Approach 2:
The patent implements feedback mechanisms where error detection results from dummy reads inform subsequent error correction actions. This closed-loop approach continuously monitors and corrects errors in high-density memory, allowing the system to maintain high productivity while dynamically managing the elevated bit error rate through real-time feedback-driven error correction.
Data Source
AI summary
An example apparatus for error correction can include an array of memory cells and a controller. The controller can be configured to perform a dummy read on a portion of data stored in the array. The dummy read can include sending a portion of data on output buffers to a host. The controller can be configured to error correct the portion of data in the host. The controller can be configured to write the portion of data back to the array.