DRAM ECC Flag Bit Refresh for Lower Power and Latency
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Solution Overview
Problem
Existing memory systems face challenges in reducing power consumption during refresh operations in DRAM devices, as current error correction techniques require significant time and power to generate and store syndromes, leading to increased latency and power consumption, especially when entering or exiting reduced power refresh modes.
Innovation Solution
An ECC method and system that uses a flag bit to determine if data has been modified since the last refresh, allowing for the generation and storage of new syndromes only when necessary, thereby reducing the need for frequent syndrome generation and storage, and enabling efficient data integrity checking and correction during reduced power refresh modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If syndrome generation and storage is performed frequently to ensure data integrity, then data reliability is improved, but power consumption and latency increase
Solution Approach 1:
The patent extracts the syndrome generation and storage operations from the regular refresh cycle by introducing a flag bit mechanism. The flag bit tracks whether data has been modified, allowing the system to take out (skip) unnecessary syndrome operations when the flag indicates no modification, thereby reducing power consumption while maintaining data integrity when needed.
Solution Approach 2:
Instead of performing full syndrome generation and storage on every refresh cycle, the patent applies partial action by conditionally executing these operations only when the flag bit indicates data modification. This partial execution approach reduces overall power consumption while maintaining sufficient data integrity checking.
2Reliability
If syndrome generation and storage is performed frequently to ensure data integrity, then data reliability is improved, but latency increases
Solution Approach 1:
The patent removes unnecessary syndrome generation and storage operations from the refresh cycle by using the flag bit to identify when these operations are actually needed. This extraction of redundant operations reduces the time required for refresh operations, thereby reducing latency while maintaining data integrity when modifications occur.
Solution Approach 2:
The system performs syndrome generation and storage only partially (conditionally) based on the flag bit state, rather than executing these operations on every refresh cycle. This conditional partial execution significantly reduces the time overhead associated with frequent syndrome operations, lowering latency while preserving data integrity checking capability.
3Use of energy by moving object
If refresh rate is reduced to lower power consumption, then power usage is improved, but data retention reliability deteriorates
Solution Approach 1:
The patent implements a feedback mechanism through the flag bit that tracks data modification status. This feedback allows the system to adjust the refresh and syndrome generation strategy dynamically - reducing refresh frequency to save power when data is not modified, while maintaining data retention reliability by triggering syndrome operations when modifications are detected, ensuring error correction capability is preserved.
Data Source
AI summary
A DRAM device includes an ECC generator/checker that generates ECC syndromes corresponding to items of data stored in the DRAM device. The DRAM device also includes an ECC controller that causes the ECC syndromes to be stored in the DRAM device. The ECC controller also causes a flag bit having a first value to be stored in the DRAM device when a corresponding ECC syndrome is stored. The ECC controller changes the flag bit to a second value whenever the corresponding data bits are modified, this indicating that the stored syndrome no longer corresponds to the stored data. In such case, the ECC controller causes a new ECC syndrome to be generated and stored, and the corresponding flag bit is reset to the first value. The flag bits may be checked in this manner during a reduced power refresh to ensure that the stored syndromes correspond to the stored data.