DRAM Row Layout for Integrated EDC Access and Lower Power
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Solution Overview
Problem
Dynamic random-access memory (DRAM) is prone to errors due to manufacturing variations and operational stresses, which can be exacerbated by electrical interference or high-energy particles, leading to undesirable computational errors in personal computers, workstations, and servers.
Innovation Solution
A memory system that logically divides rows of memory cells into separate contiguous regions for data storage and error detection and correction (EDC) codes, allowing for efficient error detection and correction without requiring the processor to understand memory partitioning, thereby saving power and avoiding bank conflicts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error detection and correction codes are stored in separate memory locations, then data integrity is improved, but memory access time and power consumption increase
Solution Approach 1:
The patent combines data and EDC codes into the same memory row, allowing them to be accessed simultaneously in a single memory operation. This eliminates the need for separate read operations for data and EDC codes, thereby reducing memory access time while maintaining data integrity.
Solution Approach 2:
The patent uses address remapping to allocate EDC codes in the column dimension rather than requiring separate row allocations. By remapping physical addresses to reserve specific column addresses for EDC codes within the same row, the system achieves efficient spatial organization that reduces access time.
2Reliability
If error detection and correction codes are stored in separate memory locations, then data integrity is improved, but power consumption increases
Solution Approach 1:
The patent merges data and EDC codes into the same memory row, enabling single-row activation and access operations. This reduces the number of memory operations required, thereby lowering power consumption while ensuring data integrity through integrated EDC code storage.
Solution Approach 2:
By storing EDC codes in the same row as data, the system enables continuous efficient access during normal memory operations without requiring additional power-intensive row activations or separate access sequences.
3Reliability
If memory is partitioned for data and EDC codes, then error correction capability is improved, but device complexity increases
Solution Approach 1:
The patent segments the memory row into data portions and EDC code portions with clear address remapping. This logical segmentation provides structured error correction capability while using standard memory hardware, avoiding the need for complex dedicated EDC hardware circuits.
Solution Approach 2:
The patent uses universal memory cells and address remapping logic to achieve EDC code storage, allowing the same memory infrastructure to serve both data storage and error correction functions without requiring specialized hardware components.
4Reliability
If column addresses are reserved for EDC codes, then error detection efficiency is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent performs address remapping in advance during memory initialization or controller setup, establishing fixed column address allocations for EDC codes. This preliminary configuration simplifies subsequent memory operations and reduces the precision requirements during actual data access operations.
Data Source
AI summary
A memory system employs an addressing scheme to logically divide rows of memory cells into separate contiguous regions, one for data storage and another for error detection and correction (EDC) codes corresponding to that data. Data and corresponding EDC codes are stored in the same row of the same bank. Accessing data and corresponding EDC code in the same row of the same bank advantageously saves power and avoids bank conflicts. The addressing scheme partitions the memory without requiring the requesting processor to have an understanding of the memory partition.