DRAM Frequency Adjustment for Power-Performance Balance
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Solution Overview
Problem
Conventional multimedia system-on-chips fail to achieve an optimal balance between DRAM operation efficiency and power consumption due to fixed operation frequency settings, which are not adaptable to varying bandwidth requirements during different tasks.
Innovation Solution
A DRAM operation frequency adjusting system comprising a statistic module to count effective operations, a parameter configuration module to generate a target frequency, and a frequency switch controller to adjust the operation frequency based on bandwidth utilization rates, ensuring optimal balance between performance and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the operation frequency of DRAM is increased to improve system performance, then the processing speed and bandwidth are improved, but the power consumption increases
Solution Approach 1:
The patent implements dynamic frequency adjustment by introducing a statistic module that continuously monitors DRAM bandwidth utilization and a parameter configuration module that adjusts the operation frequency in real-time based on actual workload demands, transforming the static frequency setting into a dynamic adaptive system
Solution Approach 2:
The patent changes the operation frequency parameter of DRAM based on monitored bandwidth utilization rates, adjusting this critical parameter to match actual system needs rather than maintaining a fixed high frequency setting
2Speed
If the operation frequency of DRAM is fixed at high values to ensure efficient operation, then the processing speed is maintained, but the power consumption increases during low-bandwidth tasks
Solution Approach 1:
The system dynamically adapts the DRAM operation frequency based on real-time bandwidth utilization monitoring, allowing the frequency to vary between high and low states according to actual workload requirements rather than remaining fixed
Solution Approach 2:
The statistic module provides continuous feedback on bandwidth utilization rates to the parameter configuration module, creating a closed-loop control system that adjusts frequency based on actual performance needs
3Use of energy by moving object
If the operation frequency of DRAM is adjusted dynamically to reduce power consumption, then the energy efficiency is improved, but the system complexity increases
Solution Approach 1:
The patent divides the frequency adjustment functionality into distinct modular components: a statistic module for monitoring bandwidth utilization and a parameter configuration module for adjusting frequency, making the complex control logic manageable and implementable
4Device complexity
If conventional fixed frequency configuration is used, then the device complexity is low, but the adaptability to different application environments is poor
Solution Approach 1:
The system transitions from static fixed frequency configuration to dynamic adaptive frequency adjustment, enabling the DRAM to adapt its operation frequency to different application environments and workload characteristics
Solution Approach 2:
The system performs self-adjustment of DRAM frequency by automatically monitoring its own bandwidth utilization through the statistic module and configuring appropriate frequency settings without external intervention
Data Source
AI summary
Techniques pertaining to adjusting the operation frequency of a DRAM are disclosed. According to one embodiment, the DRAM operation frequency adjusting system includes a statistic module counting effective operations of a DRAM to obtain a bandwidth utilization rate of the DRAM at a present operation frequency; a parameter configuration module including a target frequency configuration sub-module configured to generate a target operation frequency; and a frequency switch controller for switching a present operation frequency of the DRAM to the target operation frequency. The invention adjusts the operation frequency of a DRAM according to the application environment, and creates a balance between performance and power consumption of DRAMs, and thus improves operation speed of system-on-chips as well as decreases the power consumption.