DRAM Hidden Memory Scrubbing With Low Access Interference
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Solution Overview
Problem
Dynamic random-access memories (DRAMs) are susceptible to soft errors caused by cosmic rays and alpha-particle emissions, which can change stored data values without damaging the memory device, leading to computation interference.
Innovation Solution
A memory system with a local control circuit that performs asynchronous scrub transactions to correct soft errors using separate sense amplifiers for access and scrub operations, interleaved with access transactions to minimize interference and improve performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate sense amplifiers are used for access and scrub operations, then soft error correction capability is improved, but device complexity increases
Solution Approach 1:
The patent divides the sense amplifier function into separate units: access sense amplifiers for normal read/write operations and scrub sense amplifiers for error correction operations. This segmentation allows each type of operation to have dedicated hardware resources, improving soft error correction capability while managing complexity through functional separation rather than monolithic design.
2Reliability
If scrub transactions are performed asynchronously with access requests, then soft error correction effectiveness is improved, but access interference increases
Solution Approach 1:
The scrubbing operation is initiated asynchronously as a preliminary background task that operates independently of access requests. The scrub control circuit starts scrub transactions without waiting for access operations to complete, allowing error correction to proceed in advance or concurrently, thereby improving correction effectiveness while minimizing blocking of normal access operations.
Solution Approach 2:
The system dynamically manages the interaction between scrub and access operations by allowing scrub transactions to be interrupted or delayed when access requests are pending, and vice versa. This dynamic scheduling resolves conflicts between background error correction and foreground data access, reducing access interference while maintaining correction effectiveness.
3Productivity
If scrub transactions are interleaved with access operations, then memory performance is improved, but access transaction timing complexity increases
Solution Approach 1:
The scrubbing operation is performed periodically in the background at intervals determined by scrub timing parameters, independent of the access transaction schedule. This periodic execution allows scrub transactions to be interleaved with access operations in a predictable pattern, improving overall memory performance by utilizing idle time slots while keeping timing management systematic rather than ad-hoc.
Data Source
AI summary
A memory includes a local control circuitry that manages scrub transactions using a set of sense amplifiers separate from those used for access (read and write) transactions. The local control circuitry interrupts scrub transactions to prioritize access requests, thereby offering improved memory performance. The local control circuitry also divides scrub transactions into phases and periods based on whether the scrub transaction requires access to bitlines used for read and write access. This division allows the local control circuitry to interleave and interrupt scrub transactions with access transactions in a manner that minimizes access interference.