DRAM Initialization with Equalize Refresh for Stable Bit Lines

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Solution Overview

Problem

During the initialization of a dynamic random access memory, the charge amount in memory cells is not fixed due to coupling and static electricity, leading to unstable voltage states on bit lines, which results in slow sensing speed and high power consumption, and potential sensing failures.

Innovation Solution

A semiconductor memory device with an initialization method that includes an equalize circuit, refresh controller, and initialization controller to stabilize charge amounts in memory cells by periodically refreshing data using auto-refresh commands, adjusting equalize and sense control voltages, and enabling equalize circuits during initialization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If no turn on voltage is applied to the word line during initialization, then the access transistor remains in off state, but the charge amount in memory cells becomes unstable due to coupling and static electricity

Engineering Contradiction:
Improveinitialization operationVSAvoidcharge amount in memory cell
Core Design Contradiction:
Ease of operationVSStability of the object's composition

Solution Approach 1:

The patent applies preliminary action by enabling the equalize circuit before the sensing operation to pre-stabilize the charge amount in memory cells. The equalize circuit is activated during initialization to equalize charges across bit lines, ensuring stable charge amounts are established in advance before actual sensing occurs, thus preventing instability during subsequent operations.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the charge amount in memory cells is unstable, then the voltage on bit line cannot enter stable state, but sensing speed becomes slow and power consumption increases

Engineering Contradiction:
Improvesensing operationVSAvoidsensing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The equalize circuit is enabled during initialization to perform preliminary charge equalization across all bit lines before sensing operations begin. This preliminary action ensures that when sensing occurs, the bit line voltages are already in a stable state, allowing sensing to proceed quickly and reliably without the delays and power consumption associated with stabilizing voltages during sensing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The equalize circuit maintains continuous charge equalization during the initialization phase, ensuring that the stable charge state is continuously maintained across memory cells. This continuous action ensures that when sensing begins, the system is already in the optimal state for fast and reliable operation, eliminating the need for continuous stabilization during sensing itself.

Inventive Principle:
Principle #20Continuity of useful action

3Reliability

If the charge amount in memory cells is unstable, then sensing failure may occur, but enabling equalize circuits and refreshing data stabilizes the charge amount

Engineering Contradiction:
Improvesensing operationVSAvoidinitialization operation
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The equalize circuit performs self-service by automatically equalizing charges across bit lines without requiring external intervention or complex control mechanisms. The circuit uses its own internal structure to sense and correct charge imbalances, stabilizing the charge amounts in memory cells through a self-regulating process that simplifies the overall initialization operation despite the added functionality.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP4726723A1Semiconductor memory device and initialization method thereof
Publication Date: 2026.04.15 WINBOND ELECTRONICS CORP
  • EP4726723A1 patent drawingFigure 1
  • EP4726723A1 patent drawingFigure 2
  • EP4726723A1 patent drawingFigure 3

AI summary

A semiconductor memory device and an initialization method thereof are provided. The semiconductor memory device includes a memory array, a refresh controller, and an initialization controller. The memory array has a plurality of equalize circuits and N memory cells. The equalize circuits are respectively coupled to the N memory cells via a plurality of bit line pairs. The refresh controller is configured to refresh initial data in sequence to the N memory cells according to an auto-refresh command. The initialization controller is configured to perform an initialization operation according to an initialization activation command. The initialization controller enables the equalize circuits and periodically generates the auto-refresh command during the initialization operation.