DRAM I/O Buffer Reference Voltage Stabilization
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Solution Overview
Problem
In dynamic random access memory (DRAM) devices, parasitic resistances, inductances, and capacitances at input pins cause fluctuations in the reference voltage, leading to reduced accuracy in data detection.
Innovation Solution
A memory device comprising a reference voltage generator and a data input/output (I/O) buffer, where the I/O buffer receives a data signal, generates a phase control signal, and produces an output signal based on the data signal, phase control signal, and reference voltage, thereby stabilizing the reference voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the single ended method is used to connect one chip to one signal line, then the number of signal lines and pins is reduced, but the reference voltage fluctuates due to parasitic components, reducing detection accuracy
Solution Approach 1:
The patent introduces a reference voltage generator as an intermediary component that provides a stable reference voltage to the I/O buffer. This reference voltage acts as a mediator between the fluctuating input voltage (affected by parasitic components) and the data detection process, enabling accurate detection despite the presence of parasitic resistances, inductances, and capacitances in the single-ended signaling path
Solution Approach 2:
The I/O buffer implements a feedback mechanism where the reference voltage is continuously generated and fed back to compensate for voltage fluctuations caused by parasitic components. The buffer uses this feedback reference voltage to maintain stable operation and accurate data detection, effectively counteracting the harmful effects of parasitic elements in the signaling path
Data Source
AI summary
A memory device includes a reference voltage generator configured to generate a reference voltage, and a data input/output (I/O) buffer configured to receive a data signal having a first phase, generate a phase control signal having a second phase opposite to the first phase, and generate an output signal based on the data signal, the phase control signal, and the reference voltage.