DRAM Column Plane Layout for Metadata and ECC Storage

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Solution Overview

Problem

DRAM users face challenges in efficiently storing metadata without sacrificing array space for user data, as they are sensitive to losing space for regular data to accommodate metadata.

Innovation Solution

Utilizing a portion of the column select signals in DRAM to store metadata, allowing efficient mapping of metadata to data using a portion of the column address, and optionally using the remaining space for additional ECC data, thereby minimizing impact on tAA (time between internal read and data provision).

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If metadata is stored in the memory array, then metadata storage capability is improved, but array space for user data is reduced

Engineering Contradiction:
Improvemetadata storage capabilityVSAvoidarray space for user data
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The memory array is segmented into distinct regions: some column planes store user data while other column planes store metadata and ECC data. This segmentation allows metadata to be stored without completely occupying the array space, as different segments serve different purposes. The column planes are divided such that metadata resides in specific portions while other portions remain available for user data storage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of storing metadata in the traditional row-column address space that competes with user data, the patent utilizes the column plane dimension separately. By assigning specific column planes or portions thereof to metadata storage, the system adds a dimensional separation between user data and metadata, allowing both to coexist without directly competing for the same addressable space.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If column select signals are used for metadata storage, then metadata mapping efficiency is improved, but addressing complexity increases

Engineering Contradiction:
Improvemetadata mapping efficiencyVSAvoidaddressing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The column select signals are given multi-functionality: they serve both to address user data in traditional column planes and to address metadata in designated column planes. The same column select signal infrastructure is reused for both purposes, eliminating the need for separate addressing mechanisms and reducing overall addressing complexity despite the added metadata functionality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs a copied addressing scheme where a portion of the column address is used to generate both the user data address and the metadata address. By copying and transforming parts of the column address to generate metadata addresses, the system achieves efficient metadata mapping without requiring entirely separate addressing logic, thus managing complexity while improving mapping efficiency.

Inventive Principle:
Principle #26Copying

3Reliability

If additional ECC data is stored in the memory array, then error correction capability is improved, but array space for user data is reduced

Engineering Contradiction:
Improveerror correction capabilityVSAvoidarray space for user data
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The memory array is segmented to include dedicated regions for additional ECC data alongside user data and metadata. Specific column planes or portions thereof are allocated for storing additional ECC information, allowing enhanced error correction capability while maintaining distinct boundaries that preserve remaining array space for user data storage.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12541429B2Apparatuses, systems, and methods for storing memory metadata
Publication Date: 2026.02.03 MICRON TECHNOLOGY INC
  • US12541429B2 patent drawing
  • US12541429B2 patent drawing
  • US12541429B2 patent drawing

AI summary

A bank of a memory device may be divided into column planes. Each column plane may be associated with column selects. In some examples, a portion of a column plane associated with one column select may be used to store metadata associated with data of the remaining column selects. In some examples, the metadata may be mapped to the data based on a portion of a column address. In some examples, whether the memory device provides metadata responsive to a column address may be based on a value stored in a mode register. In some examples, the portion of the column plane associated with the one column select associated with metadata may also store error correction code data associated with the data of the remaining column selects.