DRAM Storage Node Pad Structure for Recessed Gate Support

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Solution Overview

Problem

Current DRAM cells with recessed gate structures suffer from defects due to limitations in processing technologies, which affect the performance and reliability of memory devices.

Innovation Solution

A semiconductor device is designed with a supporting structure between the cell and periphery regions, featuring localized larger thickness to enhance structural support for the capacitor structure, utilizing a substrate with plugs of conductive and insulating materials, and extension pads to form dummy storage node plugs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a recessed gate structure is used to increase carrier channel length, then current leakage is reduced, but structural support for capacitor structures deteriorates

Engineering Contradiction:
Improvecurrent leakage reductionVSAvoidstructural support
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies local quality by creating a supporting structure with localized larger thickness between the cell region and periphery region. This thicker supporting structure provides enhanced structural support for the capacitor structure in specific areas where it is needed, while maintaining the recessed gate structure in other areas to reduce current leakage. The supporting structure has non-uniform thickness distribution, being thicker in the region between cell and periphery and thinner in other regions.

Inventive Principle:
Principle #3Local quality

2Productivity

If processing technology is advanced to improve integration density, then device performance is improved, but manufacturing defects increase due to technology limitations

Engineering Contradiction:
Improveintegration densityVSAvoidprocessing defects
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies beforehand cushioning by introducing a supporting structure with localized larger thickness as a preventive measure. This supporting structure is formed in advance during the manufacturing process to compensate for potential structural weaknesses that may arise from advanced processing technologies. The supporting structure acts as a buffer or cushion that prevents manufacturing defects and structural failures before they occur, thereby improving both integration density and manufacturing precision.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Stability of the object's composition

If extension pads are designed with larger thickness for structural support, then capacitor structure stability is improved, but photolithography uniformity deteriorates due to varying luminous flux

Engineering Contradiction:
Improvecapacitor structure stabilityVSAvoidphotolithography uniformity
Core Design Contradiction:
Stability of the object's compositionVSManufacturing precision

Solution Approach 1:

The patent resolves this contradiction by applying local quality - the supporting structure has localized larger thickness only in the specific region between the cell region and periphery region where structural support is needed, rather than uniformly increasing the thickness of all extension pads. This localized approach provides enhanced capacitor structure stability in critical areas while maintaining uniform photolithography processing across the entire wafer, as the majority of the structure retains its original thickness profile.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250038142A1Semiconductor device and method of forming the same
Publication Date: 2025.01.30 FUJIAN JINHUA INTEGRATED CIRCUIT CO LTD
  • US20250038142A1 patent drawing
  • US20250038142A1 patent drawing
  • US20250038142A1 patent drawing

AI summary

A semiconductor device includes a substrate, plugs and a storage node pad structure. The plugs are disposed on the substrate and include first plugs with a conductive material and second plugs with an insulating material. The storage node pad structure is disposed on the plugs and includes first extension pads and at least one second extension pad. The first extension pads have a predetermined first length in a first direction and are separated from each other and arranged as an array along the first direction, being in physical contact with one of the first plugs. The at least one second extension pad has a length greater than the predetermined first length and is in physical contact with at least one of the plugs.