DRAM Plug Structure With Metal Silicide for Low-Leakage Contacts
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Solution Overview
Problem
The increasing complexity in fabricating DRAM cells with buried gates to enhance memory capacity and reliability poses challenges in achieving optimal electrical connections between storage nodes and transistor elements, particularly due to the difficulty in forming effective plug structures that maintain superior performance and reduced current leakage.
Innovation Solution
A method involving the formation of a metal silicide layer between the bottom and top plugs, where the metal silicide layer straddles spacers on either side of the bit lines, enhancing the contact between the storage node contact and the transistor element, thereby improving the electrical connection and stability of the semiconductor device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal silicide layer is formed between the bottom plug and top plug, then the electrical connection and contact area are improved, but the device structure and fabrication process become more complex
Solution Approach 1:
A metal silicide layer is introduced as an intermediary component between the bottom plug and top plug. This silicide layer serves as a mediator that improves electrical connection and increases contact area, while the self-aligned fabrication process minimizes the added structural complexity.
Solution Approach 2:
The metal silicide layer is formed in advance during the fabrication process, before final assembly. By performing the silicidation reaction preliminarily on the plug structure, the electrical connection is optimized early in the process, avoiding the need for additional complex interconnection structures later.
2Productivity
If the memory cell size is reduced to increase integration level, then the memory capacity is improved, but the current leakage from capacitors increases
Solution Approach 1:
The patent transitions from a planar gate structure to a buried gate structure that extends into the substrate depth dimension. This vertical dimensionality change allows for a longer effective channel length beneath the buried gate, which suppresses current leakage while maintaining small surface footprint for high integration.
Solution Approach 2:
The buried gate structure is nested within the substrate, with the gate extending downward into the silicon. This nested configuration allows the channel to be formed in the vertical dimension, providing leakage suppression without increasing the lateral cell dimensions, thereby maintaining high memory capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a semiconductor device with improved electrical connections and a more stable structure, reducing resistance and enhancing the overall performance and reliability of the memory device by increasing the contact area and stability of the storage node contacts.
Implementation Method 1
a metal silicide layer is formed on the substrate, the metal silicide layer is disposed between the first plugs and the second plugs
Data Source
AI summary
The present disclosure relates to a semiconductor device and a method of fabricating the same, which includes a substrate, a plurality of bit lines, a plurality of first plugs, a first spacer, a second spacer, a plurality of second plugs and a metal silicide layer. The bit lines are disposed on the substrate. The first plugs are disposed on the substrate and separated from the bit lines. The first spacer and the second spacer are disposed between each of the bit lines and the first plugs, and include a first height and a second height respectively. The second plugs are disposed on the first plugs respectively, and the metal silicide layer is disposed between the first plugs and the second plugs, wherein an end surface of the metal silicide layer is clamped between the second spacer and the first spacer.