DRAM Data Read Circuit for Flexible Sequence Switching

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Solution Overview

Problem

The existing data read processes in DRAM systems require additional commands to read data in a different sequence, leading to increased power consumption due to complex data transmission paths and long command transmission paths.

Innovation Solution

A data read circuit with fixed data transmission paths for first and second data, and a control circuit that receives control and selection signals to output corresponding output signals, allowing the output circuit to adjust the transmission sequence based on the waveform changes of these signals, thereby reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If additional commands are conveyed to read data in a different sequence, then data reading flexibility is improved, but power consumption increases

Engineering Contradiction:

Improvedata reading flexibilityVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by pre-charging bit lines to VDD/2 before read operations and pre-arranging data transmission paths. The control circuit is designed in advance to handle different read sequences without requiring additional commands, thereby reducing power consumption while maintaining reading flexibility.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamics by using a control circuit that can dynamically switch between different data transmission paths based on read sequence requirements. The output circuit dynamically selects which data to transmit first (Data1 or Data2) based on control signals, enabling flexible reading sequences without additional commands.

Inventive Principle:

Principle #15Dynamics

2Adaptability or versatility

If complex data transmission paths are used to achieve different read sequences, then data reading versatility is improved, but device complexity increases

Engineering Contradiction:

Improvedata reading versatilityVSAvoiddata transmission path complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the data transmission into separate paths for Data1 and Data2, each with dedicated output circuits. The control circuit is segmented into multiple output terminals that independently control different data paths, simplifying the overall system while enabling versatile read sequences.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements universality by designing a control circuit with multiple output terminals that can universally control different data transmission paths. The same control circuit structure handles both Data1 and Data2 transmission, providing multi-functional capability without increasing overall device complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250046364A1Data read circuit and storage device thereof

Publication Date: 2025.02.06 RUILI INTEGRATED CIRCUIT CO LTD

AI summary

The present disclosure provides a data read circuit and a storage device thereof. The data read circuit includes: a first data transmission path for transmitting first data; a second data transmission path for transmitting second data; a control circuit for receiving a control signal, a first selection signal, and a second selection signal, and outputting a first output signal and a second output signal; and an output circuit for outputting the first data and the second data based on the first output signal and the second output signal, where the output circuit transmits the first data to a third data transmission path before the second data or transmits the second data to a third data transmission path before the first data.