DRAM Refresh Bank Selection Under Access Order Constraints
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Solution Overview
Problem
Existing DRAM control methods do not effectively manage memory access with execution order constraints, leading to performance degradation due to refresh operations coinciding with memory access targets.
Innovation Solution
A memory control apparatus that generates and issues DRAM commands while excluding banks with access dependencies and optimizing refresh timing to avoid overlap with memory access, using a buffer to store commands and a refresh generation unit to determine optimal refresh candidates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If refresh is performed on a bank that is also the target of memory access with execution order constraint, then refresh operation can be executed, but memory access performance is degraded due to waiting
Solution Approach 1:
The patent segments the bank selection for refresh operations by excluding banks that are targets of memory access commands with execution order constraints. The refresh bank selection unit divides the set of all banks into two categories: banks that can be refreshed (those not targeted by constrained access commands) and banks that cannot be refreshed (those targeted by constrained access commands). This segmentation allows refresh operations to proceed independently without interfering with memory access operations that have execution order requirements, thereby preventing performance degradation while maintaining productivity.
2Reliability
If refresh is performed periodically on all banks simultaneously, then data retention is ensured, but memory access performance is degraded due to access prohibition during refresh
Solution Approach 1:
The patent applies segmentation by dividing refresh operations into bank-specific independent operations rather than simultaneous operations on all banks. The refresh bank selection unit identifies specific banks that are safe to refresh (those not currently targeted by memory access commands with execution order constraints) and performs refresh operations only on those selected banks. This allows other banks to continue serving memory access requests, thereby maintaining data retention reliability for refreshed banks while preserving memory access performance for non-refreshed banks.
Solution Approach 2:
The patent implements dynamic bank selection for refresh operations. Instead of a fixed periodic refresh schedule for all banks, the system dynamically determines which banks are eligible for refresh based on the current state of memory access commands in the buffer. The refresh bank selection unit continuously monitors the buffer for commands with execution order constraints and adjusts the set of refreshable banks accordingly. This dynamic adaptation allows the system to optimize between data retention and memory access performance in real-time based on actual workload conditions.
Data Source
AI summary
A memory control apparatus that controls access to a DRAM including a plurality of banks, the apparatus comprising: a first generation unit that generates an access command in response to an access request to the DRAM and stores the access command in a buffer; a second generation unit that generates a refresh request specifying a bank to the DRAM; and an issuance unit that issues a DRAM command to the DRAM, based on the access command stored in the buffer and the refresh request generated by the second generation unit, wherein the second generation unit determines a target bank of the refresh request from among banks remaining after excluding, from the plurality of banks, a bank that is an access target of the access command stored in the buffer and having a dependency relationship that needs to maintain issuance order.