DRAM Refresh Rate Adaptation via Temperature and Calibration
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Solution Overview
Problem
Dynamic Random Access Memory (DRAM) in electronic devices consumes excessive power during power saving modes due to unnecessary refresh operations, leading to battery drain, as existing systems lack personalized refresh rate adjustments based on specific DRAM and System on Chip (SOC) combinations.
Innovation Solution
The system performs calibration tests at various temperatures and refresh rates to determine an optimal refresh rate for DRAM, using temperature information and calibration data to minimize power consumption while maintaining error correction capabilities, thereby reducing unnecessary refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If DRAM refresh operations are performed at a fixed high rate to ensure data integrity, then reliability is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by transitioning from a fixed refresh rate to a dynamic refresh rate that adapts to actual DRAM conditions. The system continuously monitors temperature and uses calibration data to adjust the refresh rate in real-time, ensuring data integrity is maintained only when necessary while reducing power consumption during normal operation.
Solution Approach 2:
The patent changes the refresh rate parameter based on temperature and calibration data. By storing multiple refresh rate values corresponding to different temperature ranges and selecting the appropriate rate based on current conditions, the system optimizes the balance between reliability and power consumption.
2Reliability
If refresh rate is increased to prevent memory errors, then reliability is improved, but power consumption increases
Solution Approach 1:
The patent performs preliminary calibration tests during manufacturing to establish the relationship between refresh rates, temperature, and error rates for each specific DRAM-SOC combination. This pre-characterization allows the system to operate efficiently during normal use by selecting from pre-determined optimal refresh rates without needing to perform real-time error analysis.
Solution Approach 2:
The system uses feedback from temperature sensors and calibration data to dynamically adjust the refresh rate. The SOC monitors temperature conditions and selects appropriate refresh rates from calibration data, creating a closed-loop system that maintains reliability while minimizing power consumption based on actual operating conditions.
3Device complexity
If generic refresh rates are used for all DRAM-SOC combinations, then device complexity is reduced, but manufacturing precision is worsened
Solution Approach 1:
The patent segments the refresh rate configuration into device-specific calibration data stored in non-volatile memory. Each DRAM-SOC combination has its own calibrated refresh rate characteristics, allowing generic hardware to support highly customized behavior through segmentation of configuration data rather than hardware complexity.
Data Source
AI summary
A system and method of refreshing dynamic random access memory (DRAM) are disclosed. A device includes a DRAM, a bus, and a system-on-chip (SOC) coupled via the bus to the DRAM. The SOC is configured to refresh the DRAM at a particular refresh rate based on a temperature of the DRAM and based on calibration data determined based on one or more calibration tests performed while the SOC is coupled to the DRAM.