DRAM Partial Array Refresh Timing for Masked Memory Segments
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Solution Overview
Problem
As DRAM capacities increase, the fixed number of refresh commands over a fixed time period becomes inefficient, leading to power wastage due to refreshing entire memory ranges that are not in use, while maintaining data reliability.
Innovation Solution
A memory controller monitors segment masking and row refresh schemes to adjust the refresh cycle time based on the number of rows to be refreshed, allowing for reduced waiting periods between commands when segments are masked.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the fixed number of refresh commands is maintained over a fixed time period, then data reliability is ensured, but power consumption increases due to refreshing unused memory ranges
Solution Approach 1:
The patent implements dynamic refresh command adjustment by the memory controller, which modifies the number of refresh commands issued based on real-time monitoring of memory access patterns and segment masking status. When segments are masked (not in use), the controller reduces refresh commands for those segments, making the refresh operation adaptive rather than fixed, thereby reducing power consumption while maintaining reliability for active segments
Solution Approach 2:
The memory controller employs feedback mechanisms by monitoring memory access patterns and segment masking registers to determine which memory segments are currently in use. This feedback information is used to dynamically adjust the number of refresh commands issued to each segment, ensuring that refresh operations are performed only on active segments, thus reducing power consumption while maintaining data reliability where needed
2Use of energy by moving object
If the number of refresh commands is reduced to save power, then power consumption decreases, but data reliability may be compromised
Solution Approach 1:
The patent applies local quality by treating different memory segments differently based on their usage status. Active segments receive the full complement of refresh commands to ensure data reliability, while inactive (masked) segments receive reduced or no refresh commands to save power. This localized differentiation allows the system to optimize power consumption without compromising reliability in segments where data must be maintained
Solution Approach 2:
The memory system is divided into multiple segments that can be independently monitored and controlled. The memory controller tracks which segments are masked (inactive) and which are active, allowing it to issue refresh commands selectively to only those segments that require data maintenance. This segmentation enables granular control over refresh operations, reducing power consumption for inactive segments while preserving reliability for active segments
3Device complexity
If the refresh cycle time is fixed, then timing simplicity is maintained, but command issuance efficiency decreases when segments are masked
Solution Approach 1:
The patent implements dynamic refresh cycle timing by allowing the memory controller to adjust the timing between refresh commands based on segment masking status. When segments are masked, the controller can issue subsequent commands earlier than the fixed timing would allow, as fewer rows need to be refreshed. This dynamic timing adjustment improves command issuance efficiency without significantly increasing timing complexity, as the controller simply monitors masking status and adapts timing accordingly
Data Source
AI summary
A memory controller combines information about which memory component segments are not being refreshed with the information about which rows are going to be refreshed next, to determine, for the current refresh command, the total number of rows that are going to be refreshed. Based on this total number of rows, the memory controller selects how long to wait after the refresh command before issuing a next subsequent command. When the combination of masked segments and the refresh scheme results in less than the ‘nominal’ number of rows typically refreshed in response to a single refresh command, the waiting period before the next command (e.g., non-refresh command) is issued may be reduced from the ‘nominal’ minimum time period, thereby allowing the next command to be issued earlier.