DRAM Refresh Control Using Active Word Line Skip Logic

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Solution Overview

Problem

The increasing integration of DRAM cells leads to interference between adjacent cells, affecting data reliability and refresh operations, resulting in high power consumption due to the need for frequent refresh operations.

Innovation Solution

A memory device with an active tagging latch that determines whether a word line has been activated, allowing the system to skip refresh operations on active word lines, reducing power consumption by selectively performing refresh operations based on active status.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If refresh operations are performed on all word lines periodically, then data reliability is maintained, but power consumption increases due to unnecessary refresh operations on active word lines

Engineering Contradiction:
Improvedata reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by differentiating the refresh treatment for each word line based on its individual access status. Instead of uniform refresh operations across all word lines, the system selectively performs refresh only on inactive word lines while skipping active ones, thereby optimizing power consumption while maintaining data reliability where needed.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements dynamics by making the refresh operation adaptive to real-time access patterns. The refresh control circuit dynamically determines whether to perform refresh operations based on the current activation status of word lines, transitioning from a static periodic refresh approach to a dynamic conditional refresh approach that responds to actual system state.

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If refresh operations are skipped on active word lines, then power consumption is reduced, but data reliability may be compromised if interference affects the cells

Engineering Contradiction:
Improvepower consumptionVSAvoiddata reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent employs feedback by continuously monitoring the activation status of word lines through the active tagging latch and using this information to control refresh operations. The refresh control circuit receives feedback about which word lines are currently active and adjusts its behavior accordingly, ensuring that refresh operations are skipped only when safe to do so based on real-time system state information.

Inventive Principle:
Principle #23Feedback

3Quantity of substance

If the distance between DRAM cells is reduced to increase integration, then device density improves, but interference between adjacent cells increases affecting refresh operations

Engineering Contradiction:
Improvedevice densityVSAvoidinterference between adjacent cells
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent applies the taking out principle by extracting and identifying the specific word lines that are currently active through the row decoder and active tagging latch mechanism. By separating the refresh operation from the active access operation and selectively applying refresh only to inactive word lines, the system eliminates unnecessary refresh operations that would contribute to interference, thereby mitigating the harmful effects of reduced cell spacing.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12494243B2Memory device, memory system including memory device, and method of operating memory device
Publication Date: 2025.12.09 SAMSUNG ELECTRONICS CO LTD
  • US12494243B2 patent drawing
  • US12494243B2 patent drawing
  • US12494243B2 patent drawing

AI summary

A method of operating a memory device, the method includes periodically receiving a refresh command from a host, determining whether a target row address is activated during a predetermined period of time, and skipping a refresh operation on a word line corresponding to the target row address when the target row address is activated, and transmitting, to the host, a refresh skip signal corresponding to the word line on which the refresh operation is skipped, or performing, in response to the refresh command, a refresh operation on a word line corresponding to the target row address when the target row address is not activated.