Temperature-Adaptive DRAM Refresh Mapping for Data Retention
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Solution Overview
Problem
Existing semiconductor memories, particularly DRAMs, face challenges in adjusting refresh rates effectively due to fixed initial temperature sections, leading to inefficient data retention and increased power consumption.
Innovation Solution
A memory system with a peripheral circuit that includes a temperature sensing circuit, a control logic circuit, and a configuration mapping table to dynamically adjust refresh rates based on temperature changes, allowing for flexible configuration of refresh rates tailored to the data retention characteristics of individual memories.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed initial refresh rates are used for all temperature conditions, then the memory structure remains simple, but data retention reliability deteriorates at extreme temperatures
Solution Approach 1:
The temperature range is segmented into multiple sections (first through fourth temperature sections), each with its own optimized initial refresh rate. The configuration mapping table divides the temperature range into discrete intervals, allowing different refresh rate parameters to be applied to each segment, thereby improving data retention reliability across varying temperature conditions without requiring a completely complex adaptive system.
Solution Approach 2:
The initial refresh rate parameter is changed based on temperature conditions by selecting from predefined values in the configuration mapping table. Different initial refresh rate values (e.g., 8×, 16×, 32×, 64× the basic refresh rate) are assigned to different temperature sections, optimizing data retention for each thermal environment while maintaining system manageability through discrete parameter selection.
2Reliability
If refresh rate is increased to ensure data retention at high temperatures, then data retention improves, but power consumption increases
Solution Approach 1:
The initial refresh rate parameter is dynamically adjusted based on temperature conditions by selecting from the configuration mapping table. At lower temperatures where data retention is more stable, lower initial refresh rate values are selected, reducing power consumption. At higher temperatures where data retention is more challenging, higher initial refresh rate values are selected to ensure reliability, thus optimizing the trade-off between data retention and power consumption across different thermal environments.
Solution Approach 2:
The refresh rate configuration transitions from a static fixed value to a dynamic temperature-dependent value. The control logic circuit continuously monitors temperature and adjusts the initial refresh rate accordingly, allowing the system to consume less power during stable thermal conditions while maintaining high reliability during temperature extremes, thereby dynamically optimizing the balance between data retention and power consumption.
3Reliability
If custom configuration mapping tables are created for each memory, then data retention characteristics are optimized, but manufacturing complexity increases
Solution Approach 1:
The configuration mapping table is segmented into standardized temperature sections with predefined initial refresh rate values. This segmentation allows memory devices to be manufactured with a common template structure that can be universally applied, reducing manufacturing complexity. Each segment represents a discrete temperature range with an optimized refresh rate, allowing customization without requiring complete redesign for each memory device.
Solution Approach 2:
The configuration mapping table uses discrete parameter values for initial refresh rates that can be easily programmed during manufacturing. By defining specific temperature thresholds and corresponding refresh rate multipliers (8×, 16×, 32×, 64× basic refresh rate), the system allows for straightforward configuration during the manufacturing process while maintaining optimized data retention characteristics for each temperature condition.
4Use of energy by moving object
If temperature-based refresh rate adjustment is implemented, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The temperature range is divided into discrete sections with clear threshold boundaries, and the configuration mapping table provides predefined refresh rate values for each section. This segmentation simplifies the control logic by eliminating the need for continuous calculation or complex decision-making algorithms. The control logic circuit only needs to determine which temperature section the current temperature falls into and retrieve the corresponding initial refresh rate from the table, thereby reducing control circuit complexity while still achieving power consumption optimization.
Solution Approach 2:
The configuration mapping table serves as an intermediary between the temperature sensing mechanism and the refresh rate control. Instead of requiring the control logic to directly calculate optimal refresh rates based on temperature, the mapping table pre-computes and stores the optimal initial refresh rate values for each temperature section. This intermediary structure simplifies the control logic by transforming a complex optimization problem into a simple table lookup operation, reducing device complexity while maintaining power consumption benefits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures reliable data retention by avoiding data loss and reducing power consumption through optimized refresh operations, extending the service life of the memory.
Implementation Method 1
a temperature sensing circuit configured to sense the temperature of the memory and generate a temperature signal based on the sensed temperature
Data Source
AI summary
Examples of the present disclosure provide a memory, an operation method thereof, a memory system and an electronic apparatus. The memory includes a peripheral circuit and the peripheral circuit includes a first register circuit configured to store a plurality of initial refresh rates that are in one-to-one correspondence to a plurality of initial temperature sections; a temperature sensing circuit configured to sense a temperature of the memory and generate a temperature signal based on the sensed temperature; and a control logic circuit configured to determine a target configuration refresh rate based on the temperature signal and a configuration mapping table and adjust a target initial refresh rate of the plurality of initial refresh rates to the target configuration refresh rate, wherein the configuration mapping table includes a plurality of configuration temperature sections and a plurality of configuration refresh rates that are in one-to-one correspondence.