DRAM Resistance Calibration Circuit With Short Calibration Mode
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Solution Overview
Problem
Current resistance calibration methods in dynamic random access memory (DRAM) consume excessive power and system time due to the need for full calibration mode, which is inefficient and resource-intensive.
Innovation Solution
A resistance calibration circuit and method that introduces a short calibration mode, allowing for reduced power consumption and resource occupation by performing calibration in either full or short mode based on the comparison of last latched and initial resistance control code values, enabling efficient resistance adjustment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If full calibration mode is used for resistance calibration, then calibration accuracy is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic calibration mode selection that adapts between full calibration mode and short calibration mode based on system state. The calibration circuit dynamically determines whether to perform complete calibration or use a shortened version, allowing the system to optimize between accuracy and power consumption in real-time operating conditions.
Solution Approach 2:
The patent changes the calibration process parameters by introducing a short calibration mode that modifies the calibration sequence and duration. By adjusting calibration parameters (such as skipping certain calibration steps or reducing calibration iterations), the system achieves acceptable calibration accuracy with reduced power consumption when full precision is not required.
2Measurement precision
If full calibration mode is used for resistance calibration, then calibration accuracy is improved, but system time increases
Solution Approach 1:
The patent implements dynamic calibration mode selection that adapts between full calibration mode and short calibration mode based on system state. The calibration circuit dynamically determines whether to perform complete calibration or use a shortened version, allowing the system to optimize between accuracy and time consumption in real-time operating conditions.
Solution Approach 2:
The patent applies partial calibration action by implementing a short calibration mode that performs only the essential calibration steps needed for acceptable performance. Rather than always executing the complete calibration sequence, the system performs a shortened version that achieves sufficient calibration accuracy for many operating conditions, reducing the time penalty.
3Use of energy by moving object
If short calibration mode is used, then power consumption is reduced, but calibration accuracy may be compromised
Solution Approach 1:
The patent implements dynamic calibration mode selection that adapts between full calibration mode and short calibration mode based on system state. The calibration circuit dynamically determines whether to perform complete calibration or use a shortened version, allowing the system to optimize between accuracy and power consumption in real-time operating conditions.
Solution Approach 2:
The patent uses feedback mechanisms to monitor calibration results and system operating conditions. Based on this feedback, the system intelligently selects between short and full calibration modes, ensuring that calibration accuracy remains adequate while minimizing power consumption. The feedback loop allows the system to verify whether short calibration achieved sufficient accuracy or if full calibration is needed.
Data Source
AI summary
Provided are a resistance calibration circuit, a resistance calibration method, and a memory. When a short calibration enable signal is valid, calibration processing is performed on a resistance control code in one of a short calibration mode and a full calibration mode based on a comparison result of a last latched value and an initial default value of the resistance control code.