DRAM Error Scrub Segmentation Across Refresh Commands
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Solution Overview
Problem
Current memory devices face challenges in efficiently performing error check and scrub (ECS) procedures concurrently with refresh operations, leading to potential signaling conflicts and increased bit error rates due to limited time windows for refresh commands.
Innovation Solution
The ECS procedure is segmented into two portions, with the first portion performed during a refresh command to read and correct code words, and the second portion executed during a subsequent refresh command to write corrected data, allowing completion within the time window of each refresh operation and avoiding conflicts with other memory operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error check and correction operations are performed during refresh commands, then bit error rates are reduced and reliability is improved, but signaling conflicts occur with other memory operations due to limited time windows
Solution Approach 1:
The error check and scrub (ECS) procedure is divided into two separate portions: an ECS-read portion executed during a first refresh command time window, and an ECS-write portion executed during a second refresh command time window. This segmentation allows error detection and correction operations to be distributed across different time windows, preventing signaling conflicts with other memory operations while maintaining reliability improvements.
2Use of energy by moving object
If ECS procedure is performed within refresh command time windows, then power consumption is reduced by avoiding additional operation cycles, but error correction capacity must be sufficient to handle errors detected within the limited time window
Solution Approach 1:
The ECS-read portion is executed first during the initial refresh command time window to detect errors in code words before they propagate. By performing error detection preliminarily within the refresh time window, the system identifies errors early while minimizing additional power consumption, and the subsequent ECS-write portion corrects these detected errors without requiring extended operation cycles.
Data Source
AI summary
Methods, systems, and apparatuses for a memory device (e.g., DRAM) including an error check and scrub (ECS) procedure in conjunction with refresh operations are described. The ECS procedure may include read/modify-write cycles when errors are detected in code words. In some embodiments, the memory device may complete the ECS procedure over multiple refresh commands, namely by performing a read (or read/modify) portion of the ECS procedure while a first refresh command is executed, and by performing a write portion of the ECS procedure while a second refresh command is executed. The ECS procedure described herein may facilitate avoiding signaling conflicts or interferences that may occur between the ECS procedure and other memory operations.


