DRAM Self-Refresh Control During FPGA Reconfiguration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current reconfigurable computing systems face data corruption issues during reconfiguration due to tri-stating of DRAM inputs, which limits their viability in applications requiring data persistence, especially in database operations and context switch processing.
Innovation Solution
A system and method utilizing a data maintenance block collocated with the DRAM memory to provide stable self-refresh command inputs, allowing the DRAM to maintain data integrity during reconfiguration by initiating self-refresh mode and storing data in a separate block for later retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the memory controller tri-states I/Os during FPGA reconfiguration, then the reconfigurable device can be reprogrammed, but the DRAM data becomes corrupted
Solution Approach 1:
The system performs preliminary actions by saving DRAM data to a secure location (such as external memory or register files) before the FPGA reconfiguration process begins. This ensures data is preserved before the memory controller tri-states the I/Os, preventing data corruption while enabling reconfiguration capability.
Solution Approach 2:
An intermediary storage mechanism is introduced between the DRAM and the reconfiguration process. The data maintenance block acts as a mediator that temporarily holds data during the transition, allowing the memory controller to tri-state I/Os without losing DRAM contents. This intermediary layer resolves the conflict between reconfiguration and data integrity.
2Reliability
If data is copied and restored during reconfiguration, then data integrity can be maintained, but the time required for reconfiguration becomes excessive
Solution Approach 1:
The system creates a copy of the DRAM data in a secure storage location before reconfiguration. This copying approach allows the original DRAM data to be preserved without requiring time-consuming read/write operations during the reconfiguration process itself, thus maintaining data integrity while minimizing time loss.
Solution Approach 2:
Data preservation actions are performed preliminarily, before the reconfiguration process begins. By completing data saving operations in advance, the system avoids time-consuming data management during the critical reconfiguration window, reducing overall reconfiguration time while ensuring data integrity.
3Ease of manufacture
If vendor provided memory controller IP is used, then design costs and project completion times are reduced, but flexibility to modify operating characteristics is limited
Solution Approach 1:
The memory controller functionality is segmented into modular components. The vendor-provided IP core handles standard operations, while separate data maintenance blocks handle specialized functions like data preservation during reconfiguration. This segmentation allows use of cost-effective vendor IP while adding flexibility through modular extensions.
Solution Approach 2:
The memory controller design incorporates multi-functional capabilities by integrating data maintenance blocks that can serve multiple purposes: preserving data during reconfiguration, supporting different reconfiguration scenarios, and maintaining compatibility with vendor IP. This universality provides flexibility without requiring complete custom design.
Data Source
AI summary
A system and method for retaining dynamic random access memory (DRAM) data when reprogramming reconfigurable devices with DRAM memory controllers such as field programmable gate arrays (FPGAs). The DRAM memory controller is utilized in concert with a data maintenance block collocated with the DRAM memory and coupled to an I2C interface of the reconfigurable device, wherein the FPGA drives the majority of the DRAM input/output (I/O) and the data maintenance block drives the self-refresh command inputs. Even though the FPGA reconfigures and the majority of the DRAM inputs are tri-stated, the data maintenance block provides stable input levels on the self-refresh command inputs.