DRAM Self-Refresh Voltage Scaling for Lower Sleep Power
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Dynamic random access memory (DRAM) loses data due to charge leakage over time, necessitating frequent refresh operations that consume power and increase energy consumption.
Innovation Solution
A memory device that performs a self-refresh operation by reducing the internal voltage from a first voltage to a second, lower voltage during power-saving modes like deep-sleep and power-down, maintaining this lower voltage until an exit command is received, thereby reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If refresh operations are performed frequently to prevent charge leakage, then data retention reliability is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the refresh operation mode changeable based on power management needs. The memory device can dynamically switch between normal refresh mode and self-refresh mode, adjusting the refresh behavior to balance between data retention reliability and power consumption. This is achieved through mode register settings that control whether refresh operations are performed internally or externally.
Solution Approach 2:
The patent implements self-service through the self-refresh mode where the memory device autonomously performs refresh operations using its internal counter and control logic without requiring external controller intervention. This allows the memory device to maintain its own data integrity while consuming less power compared to external refresh operations, effectively serving its own refresh needs.
2Use of energy by moving object
If self-refresh mode is entered to reduce power consumption, then energy efficiency is improved, but data retention capability may deteriorate
Solution Approach 1:
The patent applies parameter changes by modifying the operational parameters during self-refresh mode. The internal counter is configured with specific refresh intervals and the refresh logic is adjusted to operate at reduced power while maintaining adequate refresh frequency. These parameter optimizations ensure that data retention requirements are met even when operating in the lower-power self-refresh mode.
3Use of energy by moving object
If internal voltage is reduced during deep-sleep mode, then power consumption is reduced, but operational reliability may worsen
Solution Approach 1:
The patent implements preliminary action by preparing the memory device for low-power operation in advance. Before entering deep-sleep mode, the system performs necessary data transfers or cache updates to ensure that critical information is preserved. The mode register is pre-configured with appropriate settings that will take effect when low-power mode is entered, ensuring a smooth transition and maintaining operational reliability.
Data Source
AI summary
Disclosed is an operation method of a memory device which performs a self-refresh operation. The method includes receiving a deep-sleep mode enter command from a memory controller, changing a magnitude of an internal voltage of the memory device from a first voltage to a second voltage smaller than the first voltage, in response to the deep-sleep mode enter command, and entering a self-refresh mode under control of the memory controller, and the internal voltage is maintained at the second voltage during the self-refresh mode.