Adaptive Sense Amplifier Offset Cancellation for Stable DRAM Sensing
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Solution Overview
Problem
Dynamic random access memory (DRAM) devices experience undesirable offset noise in sense amplifiers due to variations in power supply voltages and process, voltage, and temperature changes, affecting sensing margins and operating characteristics.
Innovation Solution
A memory device with a voltage detection circuit and temperature sensor that adjusts the offset cancellation time of the sense amplifier based on detected voltage and temperature information, using a control circuit to enhance sensing margins by canceling offset noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If offset cancellation operation is performed with fixed time interval, then device complexity is reduced, but sensing precision deteriorates due to PVT variations and power supply voltage changes
Solution Approach 1:
The patent implements dynamic adjustment of the offset cancellation time interval based on detected power supply voltage levels. The control circuit varies the time interval according to voltage conditions, allowing the system to adapt to changing operating conditions and maintain sensing precision without requiring overly complex fixed-time control mechanisms
Solution Approach 2:
The patent employs feedback mechanisms where the control circuit detects power supply voltage levels and uses this information to adjust the offset cancellation timing. This closed-loop approach enables the system to automatically compensate for voltage variations, improving sensing precision while keeping the control logic manageable through systematic feedback processing
2Measurement precision
If offset cancellation time interval is extended to compensate for low voltage conditions, then sensing precision is improved, but operating speed deteriorates
Solution Approach 1:
The patent dynamically adjusts the offset cancellation time interval based on real-time power supply voltage detection. During low voltage conditions, the time interval is extended to ensure adequate cancellation and maintain sensing precision. During normal voltage conditions, the interval is reduced to maintain fast operating speed, thus resolving the speed-precision trade-off through adaptive timing
3Measurement precision
If offset cancellation operation is performed continuously, then sensing precision is maintained under varying conditions, but energy consumption increases
Solution Approach 1:
The patent implements periodic offset cancellation operations rather than continuous operation. The control circuit determines when offset cancellation is necessary based on detected power supply voltage levels and operating conditions, performing the operation periodically only when needed. This approach maintains sensing precision under varying conditions while significantly reducing unnecessary energy consumption compared to continuous operation
Data Source
AI summary
A method of operating a memory device includes precharging a pair of true and complementary bit lines (BL/BLB) to an equivalent voltage concurrently with precharging a pair of true and complementary sense bit lines (SABL/SABLB) to the equivalent voltage, and then transferring charge associated with offset noise from BL to SABLB concurrently with transferring charge associated with the offset noise from BLB to SABL, so that a voltage difference is established between the SABL and SABLB. Next, a logic state of a memory cell connected to BI is read by transferring charge between the memory cell and BL, concurrently with equilibrating voltages on SABL and SABLB. Then, a voltage difference between SABL and SABLB is sensed and amplified in response to activating an amplifier circuit within the sense amplifier.