3D DRAM Step Region Support for Word Line Extraction

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Solution Overview

Problem

The yield of 3D stacked DRAM semiconductor structures is hindered by the collapse of active layers in the step region, which affects the drawing out of word lines.

Innovation Solution

A support structure is formed around the active layers in the step region to prevent collapse, with initial and secondary conductorizations performed to ensure electrical connection to word lines, enhancing the semiconductor structure's yield and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If 3D stacked DRAM structure is adopted to increase integration, then area efficiency is improved, but manufacturing yield deteriorates due to active layer collapse in step regions

Engineering Contradiction:
Improvearea efficiencyVSAvoidmanufacturing yield
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

A support structure is formed around the active layers in the step region before the active layers collapse can occur. This preliminary structural reinforcement prevents the harmful collapse during subsequent manufacturing processes, thereby maintaining high manufacturing yield while preserving the area efficiency benefits of the 3D stacked architecture.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The support structure acts as an intermediary element between the active layers and the surrounding environment. It provides mechanical support and stabilization to the active layers in the step region, preventing direct collapse while allowing the 3D stacked structure to maintain its compact form factor and high integration density.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If support structure is added to prevent active layer collapse, then manufacturing yield is improved, but device complexity increases

Engineering Contradiction:
Improvemanufacturing yieldVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The support structure is selectively formed only in the step region where active layer collapse occurs, rather than throughout the entire device. This localized approach prevents collapse and improves manufacturing yield while minimizing the increase in overall device complexity by confining the additional structure to only where it is critically needed.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The support structure is segmented and positioned specifically in the step region, separating the functional areas of the device. This segmentation allows the support structure to provide necessary mechanical reinforcement without complicating the entire device architecture, maintaining simplicity in regions where support is not required.

Inventive Principle:
Principle #1Segmentation

3Reliability

If conductorization processes are performed to ensure electrical connectivity, then electrical connection reliability is improved, but manufacturing process complexity increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductorization processes are merged and integrated into the existing manufacturing flow, combining the formation of conductive structures with other fabrication steps. This integration ensures reliable electrical connections between word lines and active layers while avoiding the need for entirely separate, complex manufacturing processes.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Conductive structures are formed in advance during the manufacturing process, establishing electrical connectivity before final device assembly. This preliminary formation of conductive pathways ensures reliable electrical connections are already in place, simplifying subsequent steps and reducing overall process complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20230413513A1Method of manufacturing semiconductor structure and semiconductor structure
Publication Date: 2023.12.21 CHANGXIN MEMORY TECH INC
  • US20230413513A1 patent drawing
  • US20230413513A1 patent drawing
  • US20230413513A1 patent drawing

AI summary

Embodiments of the present disclosure relate to the field of semiconductors, and provide a method of manufacturing a semiconductor structure and a semiconductor structure. The semiconductor structure includes a transistor region and a step region, the transistor region includes a word line region, the word line region directly faces and is connected to the step region, and the manufacturing method includes: providing a base and forming sacrificial layers and active layers on the base; forming first isolation layers in the transistor region, wherein the first isolation layers divide a part of the active layers into a plurality of active structures; removing a part of the first isolation layers and a part of the sacrificial layers in the word line region; forming word lines and dielectric layers in the word line region, wherein the step region includes a first region and second regions located on two sides of the first region.