DRAM Word Line Trench Layout for Reduced Bit Flipping
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Solution Overview
Problem
Existing DRAM semiconductor structures face bit flipping issues due to electromagnetic interference between word lines, which is exacerbated by the reduced physical space and manufacturing precision, making it difficult to produce significant size differences between passing and active word lines.
Innovation Solution
A manufacturing method that involves forming a thinner mask on active regions than isolation regions, resulting in narrower word line trenches in isolation regions compared to active regions, thereby reducing the impact of passing word lines and bit flipping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the width of passing word line is reduced to decrease distance between word line structures, then bit flipping is reduced, but manufacturing precision becomes difficult to achieve with existing processes
Solution Approach 1:
The patent applies preliminary action by forming a thickness difference of the mask layer over the active region and isolation region before the etching process. This pre-established thickness difference guides the etching to create different trench widths, thereby achieving different word line widths without requiring complex etching control. The mask layer thickness variation is formed in advance to predetermine the final word line structure dimensions.
Solution Approach 2:
The patent implements local quality by creating a non-uniform mask layer where the thickness varies locally over different regions. Specifically, the mask layer has a first thickness over the active region and a second thickness over the isolation region, with the thickness ratio being different. This local thickness variation causes the etching process to produce trenches of different widths in different regions, resulting in passing word lines with different widths from active word lines.
2Manufacturing precision
If manufacturing precision of DRAM is increased to improve device performance, then physical space occupied by components becomes smaller, but electromagnetic interference between memory cells increases
Solution Approach 1:
The patent applies local quality by creating spatially varying mask layer thicknesses that result in different trench widths for different functional regions. The mask layer has a first thickness over the active region and a second thickness over the isolation region, producing narrower passing word lines in isolation regions and wider active word lines in active regions. This local differentiation reduces electromagnetic interference while maintaining the benefits of high manufacturing precision.
3Reliability
If the distance between word line structures is increased to reduce bit flipping, then manufacturing complexity increases, but existing processes cannot easily produce large size differences
Solution Approach 1:
The patent uses preliminary action by pre-forming the mask layer with different thicknesses over different regions before the etching process. This preliminary thickness differentiation simplifies the overall manufacturing process by converting a complex post-etch size control problem into a simpler pre-etch mask formation problem. The thickness difference is established in advance using standard deposition and patterning techniques.
Solution Approach 2:
The patent applies parameter changes by varying the mask layer thickness parameter across different regions. The mask layer thickness is changed from a first thickness over the active region to a second thickness over the isolation region, creating a thickness ratio that directly controls the resulting trench width ratio. This parameter variation approach simplifies process complexity by using a single controllable parameter (mask thickness) to achieve the desired structural differentiation.
Data Source
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AI summary
The present disclosure provides a manufacturing method of a semiconductor structure and a semiconductor structure. The manufacturing method of a semiconductor structure includes: providing a substrate, where the substrate includes active regions and isolation regions, each of the isolation regions includes a first trench and an isolation layer formed in the first trench; removing part of the isolation layer to form first grooves; forming a first mask layer, where the first mask layer covers upper surfaces of the active regions and fills the first grooves; planarizing the first mask layer, such that an upper surface of a portion of the first mask layer located above the active regions is flush with an upper surface of a portion of the first mask layer located above the isolation regions; removing part of the first mask layer, part of the isolation layer, and part of the substrate, to form second trenches and third trenches, where each of the second trenches is located in each of the isolation regions, each of the third trenches is located in each of the active regions, and a width of the third trench is greater than that of the second trench; and forming word line structures in the second trenches and the third trenches.