DRAM Wordline Delay Circuit for Low-Temperature Write Recovery
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Solution Overview
Problem
Semiconductor memory devices face reliability issues due to temperature-dependent timing variations, which can lead to incorrect sequence execution and reduced reliability, especially at low temperatures, and hot-carrier degradation of transistors.
Innovation Solution
A delay circuit is integrated into the semiconductor memory device to introduce a temperature-dependent delay in command signals, with the delay being inversely proportional to temperature, ensuring that critical operations like wordline deactivation occur only after write recovery time has elapsed, thereby mitigating the effects of temperature variations and hot carrier degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If temperature-dependent timing variations are present in memory devices, then timing stability is improved at high temperatures, but reliability deteriorates at low temperatures due to incorrect sequence execution
Solution Approach 1:
The patent applies parameter changes by modifying the timing parameters of command signals based on temperature conditions. A delay circuit introduces temperature-dependent delays to command signals, adjusting the timing parameters dynamically. At low temperatures, the delay circuit adds longer delays to compensate for slower transistor switching speeds, ensuring that timing sequences remain valid across the full operating temperature range while maintaining reliability.
2Device complexity
If standard timing sequences are used without temperature compensation, then device complexity is reduced, but reliability deteriorates due to temperature-dependent timing variations
Solution Approach 1:
The patent introduces a delay circuit as an intermediary component between the command signal source and the memory device logic. This intermediary circuit provides temperature-dependent delay adjustment without requiring complex temperature sensing or control logic throughout the entire system. The delay circuit acts as a buffer that compensates for temperature effects, maintaining reliability while adding minimal complexity to the overall system architecture.
3Productivity
If write operations are performed at low temperatures, then productivity is improved, but hot-carrier degradation of transistors increases
Solution Approach 1:
The patent applies preliminary action by inserting a delay before the wordline deactivation command is executed. This preliminary delay ensures that sufficient time elapses between the write operation completion and the subsequent precharge operation, allowing write recovery to complete properly even at low temperatures. By proactively managing the timing sequence, the system maintains productivity while preventing the harmful effects of hot-carrier degradation that would occur with premature wordline deactivation.
Data Source
AI summary
Apparatuses and methods for a temperature dependent delay between a wordline off signal and deactivating the wordline are disclosed. Memory devices may have reduced reliability when operating at relatively cold temperatures, which may be due in part to an increase in the write recovery time while the inning for a wordline to deactivate remains relatively unaffected. In some embodiments of the present disclosure, a delay circuit is used to insert a temperature dependent delay between a wordline off command being issued and the wordline being deactivated. The delay circuit may increase the length of temperature dependent delay at relatively cold temperatures, and decrease the length of the delay at relatively warm temperatures.