DRAM Positive Wordline Voltage Compensation for GIDL Leakage
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Solution Overview
Problem
Current DRAM designs face a tradeoff between performance and standby current consumption due to gate-induced drain leakage (GIDL) from fixed positive and negative wordline voltages, which are not adjusted for variations in array device threshold voltage caused by temperature and process variations.
Innovation Solution
A DRAM positive wordline voltage compensation device that automatically adjusts the positive wordline voltage using a comparator, oscillator, and charge pump, incorporating a voltage divider to generate a compensating reference for array device threshold voltage, allowing the voltage to be dynamically adjusted based on temperature and process variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed positive and negative wordline voltages are used to ensure memory cell functionality at worst case conditions, then the memory cell can function reliably, but standby current consumption increases due to GIDL
Solution Approach 1:
The patent implements dynamic adjustment of the positive wordline voltage (vpp) based on the actual array device threshold voltage (Vt) conditions. Instead of using a fixed vpp value, the system continuously monitors Vt variations and adjusts vpp accordingly through a feedback mechanism, allowing the voltage to be high enough only when necessary to compensate for Vt variations, thereby reducing GIDL current during normal operation while maintaining reliability
Solution Approach 2:
The patent changes the parameter of positive wordline voltage from a fixed value to a variable value that adapts to threshold voltage variations. By implementing a compensation mechanism that modifies vpp based on actual Vt conditions, the system optimizes the voltage parameter to minimize GIDL current while ensuring memory cell functionality is maintained under all operating conditions
2Reliability
If a high positive wordline voltage is used to compensate for threshold voltage variations, then memory cell functionality is ensured, but GIDL leakage current increases
Solution Approach 1:
The patent implements a feedback mechanism that monitors the array device threshold voltage (Vt) and uses this information to adjust the positive wordline voltage (vpp). The system compares the actual Vt with reference values and dynamically modifies vpp to provide exactly the compensation needed, avoiding excessive voltage that would generate harmful GIDL current while ensuring sufficient voltage for reliable memory cell operation
Solution Approach 2:
The patent applies preliminary compensation by adjusting the positive wordline voltage in advance based on predicted or measured threshold voltage variations. The compensation mechanism proactively modifies vpp to counteract the harmful GIDL effect before it becomes significant, ensuring memory cell functionality while minimizing leakage current generation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces GIDL leakage current and standby leakage currents by optimizing the positive wordline voltage, thereby improving energy efficiency and performance.
Implementation Method 1
a limiter as a comparator with a first input terminal for receiving a positive wordline voltage feedback signal, a second input terminal for receiving a compensating reference of array device threshold voltage
Implementation Method 2
a charge pump having a first input terminal for receiving a second enable signal, a second input terminal for receiving an oscillating signal and an output terminal for generating a positive wordline voltage being a sum of a bitline high voltage, an array device threshold voltage and a voltage margin
Data Source
AI summary
The configurations of a DRAM positive wordline voltage compensation device and a voltage compensating method thereof are provided in the present invention. The proposed device includes a comparator having a first input terminal receiving a positive wordline voltage feedback signal, a second input terminal receiving a compensating reference of array device threshold voltage and an output terminal generating a first enable signal, an oscillator receiving the first enable signal and generating an oscillating signal when the first enable signal is active and a charge pump having a first input terminal receiving a second enable signal, a second input terminal receiving the oscillating signal and an output terminal generating a positive wordline voltage being a sum of a bitline high voltage, an array device threshold voltage and a voltage margin.