DRAM Word Line Trench Width Control for Bit Flipping Resistance
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Solution Overview
Problem
The existing DRAM semiconductor structures are vulnerable to bit flipping due to electromagnetic interference between memory cells, which increases as manufacturing precision improves and physical space decreases, making it difficult to produce significant size differences in word lines using existing processes.
Innovation Solution
A manufacturing method that involves forming a substrate with active and isolation regions, creating trenches and trenches of varying widths, and forming word line structures in these trenches to reduce the impact of passing word lines on active word lines, thereby minimizing bit flipping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the width of passing word line is reduced to increase distance between word line structures, then bit flipping is reduced, but it is difficult to produce large size difference through existing etching processes
Solution Approach 1:
The patent applies preliminary action by forming a thickness difference in the mask layer before the etching process. The mask layer is formed with greater thickness in regions corresponding to passing word lines compared to active word lines. This pre-established thickness difference enables the etching process to naturally produce different trench widths, with wider trenches for passing word lines and narrower trenches for active word lines, thereby resolving the manufacturing difficulty of achieving significant size differences through etching alone.
2Productivity
If manufacturing precision of DRAM increases to improve memory capacity, then more memory cells fit on single chip, but electromagnetic interference between memory cells becomes unavoidable
Solution Approach 1:
The patent applies local quality by creating different trench widths for different regions. Passing word lines are formed in wider trenches while active word lines are formed in narrower trenches. This localized structural differentiation allows the structure to simultaneously achieve high integration density (through narrow active word line trenches) and electromagnetic interference mitigation (through wide passing word line trenches that increase spacing), thereby resolving the contradiction between memory capacity and electromagnetic interference.
3Reliability
If distance between two word line structures is increased to reduce bit flipping, then passing word line width must be reduced, but existing processes cannot produce large size difference
Solution Approach 1:
The patent introduces the mask layer as an intermediary element that mediates the trench width formation process. By controlling the mask layer thickness to be greater in passing word line regions, the etching process is guided to create wider trenches for passing word lines. This intermediary mask layer enables precise control of trench width differences without requiring direct manipulation of the etching process parameters, thereby achieving the desired word line spacing and reducing bit flipping while maintaining manufacturing precision.
Data Source
AI summary
The present disclosure provides a manufacturing method of a semiconductor structure and a semiconductor structure. The manufacturing method of a semiconductor structure includes: providing a substrate, the substrate includes active regions and isolation regions, each of the isolation regions includes a first trench and an isolation layer formed in the first trench; removing part of the isolation layer to form first grooves; forming a first mask layer, the first mask layer covers upper surfaces of the active regions and fills the first grooves; planarizing the first mask layer, such that an upper surface of a portion of the first mask layer located above the active regions is flush with an upper surface of a portion of the first mask layer located above the isolation regions; removing part of the first mask layer, part of the isolation layer, and part of the substrate, to form second trenches and third trenches.