DRAM Access Granularity Refresh Control
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Solution Overview
Problem
Existing memory devices face challenges in managing data refresh efficiently, leading to increased communication overhead and power consumption.
Innovation Solution
The implementation of a mechanism that manages data refresh of a memory device per access-granularity, using a refresh type flag sent by a memory controller to the DRAM, allowing for normal, relaxed, or no refresh procedures, thereby reducing communication overhead and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional memory refresh control is used, then all memory rows are refreshed periodically, but communication overhead and power consumption increase
Solution Approach 1:
The patent applies local quality by implementing per-row refresh control, where each memory row can have its own refresh characteristics determined by a refresh type flag. This allows only actively accessed rows to be refreshed with normal frequency, while inactive rows use relaxed or no refresh, optimizing power consumption while maintaining data retention reliability for actually used data.
Solution Approach 2:
The patent implements dynamic refresh control where the refresh procedure adapts based on current memory access patterns. The memory controller dynamically selects between normal refresh, relaxed refresh, or no refresh for each row based on whether it has been recently accessed, making the refresh strategy flexible and adaptive rather than static and uniform.
2Reliability
If traditional memory refresh control is used, then all memory rows are refreshed periodically, but communication overhead increases
Solution Approach 1:
The patent reduces communication overhead by applying local quality through per-row refresh control. Instead of issuing refresh commands for all rows uniformly, the system selectively applies refresh only to specific rows that need it, determined by the refresh type flag associated with each row. This localized approach minimizes unnecessary communication between the memory controller and memory device.
Solution Approach 2:
The patent applies partial action by performing refresh operations only on a subset of memory rows that actually require refreshing, rather than refreshing all rows. The memory controller determines which rows need refresh based on access patterns and the associated refresh type flags, executing refresh commands only where necessary, thus reducing communication overhead while maintaining data retention for accessed data.
3Use of energy by moving object
If per-row refresh control is implemented, then refresh procedures are optimized, but additional command bandwidth is required
Solution Approach 1:
The patent merges the refresh control information with existing memory access commands. The refresh type flag is integrated into the command structure that is already being used for read and write operations, eliminating the need for separate refresh control commands. This combining approach enables per-row refresh control without increasing command bandwidth requirements.
Solution Approach 2:
The patent implements multi-functionality by making the existing command interface serve dual purposes: both data access commands and refresh control. The command structure is designed to carry both the traditional memory access information and the refresh type flag, allowing a single command bus to handle multiple functions without requiring additional dedicated command channels.
Data Source
AI summary
A system and method of operation in a dynamic random access memory (DRAM) device. The method includes receiving, by the DRAM device from a controller, a refresh type flag indicating a refresh procedure for refreshing one or more rows of a memory cell array of the DRAM device. The method includes storing the refresh type flag in refresh control circuitry of the DRAM device. The method includes performing the row refresh of the DRAM device according to the refresh type flag stored in the refresh control circuitry.