DRAM Block Grouping for Substandard Cell Parameter Control
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Solution Overview
Problem
Dynamic random access memory (DRAM) systems face inefficiencies due to varying operating characteristics among memory blocks, particularly those with substandard memory cells that require different control parameters for optimal performance, leading to degraded performance and potential data loss.
Innovation Solution
A memory device with a control setting circuit that groups memory blocks based on the presence of substandard cells and sets individual control parameters for each group, using test results to identify and manage substandard cells, enabling selective operation of memory blocks to enhance performance and data storage capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory blocks with substandard cells operate using uniform control parameters, then device complexity is reduced, but reliability and performance are degraded
Solution Approach 1:
The memory device divides memory blocks into multiple groups based on test results identifying substandard cells. Each group is assigned specific control parameters optimized for its characteristics. This segmentation allows reliable operation of blocks with substandard cells while maintaining manageable system complexity through automated grouping and parameter assignment.
Solution Approach 2:
The invention changes control parameters (such as refresh timing, read/write timing, or voltage levels) specifically for memory blocks containing substandard cells. By adjusting these parameters based on test results, the system achieves improved reliability for problematic blocks without requiring complete system redesign, balancing reliability improvement with acceptable complexity.
2Productivity
If all memory blocks are operated at maximum speed, then productivity is improved, but reliability of blocks with substandard cells deteriorates
Solution Approach 1:
The system dynamically adjusts control parameters for different memory block groups based on their test results. Memory blocks without substandard cells operate at maximum speed for optimal productivity, while blocks with substandard cells receive adjusted parameters that ensure reliable operation. This dynamic parameter adjustment maintains high overall productivity while protecting data reliability in problematic blocks.
3Reliability
If memory blocks with substandard cells are excluded from operation, then reliability is improved, but data storage capacity is reduced
Solution Approach 1:
Instead of excluding memory blocks with substandard cells, the invention modifies control parameters for these blocks to enable reliable operation. By adjusting timing parameters, refresh rates, or voltage levels based on test results, the system maintains data storage capacity while improving the reliability of previously problematic blocks, avoiding the need to remove any storage capacity.
Data Source
AI summary
A memory device comprises a memory cell array comprising a plurality of memory blocks each comprising a plurality of memory cells and a control setting circuit. The control setting circuit divides the memory blocks into at least first and second groups based on whether each of the memory blocks comprises at least one substandard memory cell, and sets individually control parameters of the first and second groups. The substandard memory cells are identified based on test results of the memory cells with respect to at least one of the control parameters. Each memory block in the first group comprises at least one substandard memory cell, and each memory block in the second group comprises no substandard memory cell.