DRAM Buffer Caching to Reduce Read Latency and Power
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing DRAM systems are not time efficient as they require reactivation of the memory row for subsequent requests for the same data, leading to increased read times and power consumption.
Innovation Solution
Incorporating a buffer that temporarily stores data and provides it upon subsequent requests without reactivating the memory row, utilizing an address register with latches to control the memory row activation and data retrieval, allowing direct data provision from the buffer when the same address is latched multiple times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the memory row is reactivated for subsequent requests for the same data, then the data can be retrieved from the memory row, but the read time increases and power consumption increases
Solution Approach 1:
The buffer temporarily stores data from the memory row in advance, so that when a subsequent request for the same data arrives, the data can be provided directly from the buffer without reactivating the memory row. This preliminary storage action eliminates the need for time-consuming and power-intensive memory row reactivation.
Solution Approach 2:
The buffer acts as an intermediary between the memory row and the output. Instead of directly retrieving data from the memory row for every request, the buffer mediates by holding copies of frequently accessed data, allowing rapid provision of data without involving the memory row activation process.
2Productivity
If the buffer temporarily stores data for subsequent requests, then the read time is reduced, but the device complexity increases
Solution Approach 1:
The memory system is segmented into distinct functional components: the memory row for long-term storage and the buffer for temporary caching. This segmentation allows each component to specialize in its function, with the buffer handling rapid data provision while the memory row maintains data persistence, improving overall time efficiency.
Solution Approach 2:
The system adds a temporal dimension to data storage by introducing the buffer as a short-term cache layer. This creates a hierarchical storage structure where data can exist in different temporal states (permanent in memory row, temporary in buffer), enabling faster access for recently accessed data while maintaining the original memory structure.
Data Source
AI summary
The present disclosure provides a dynamic random access memory (DRAM), and a method of operating the same. The DRAM includes a memory row and a buffer. The memory row is configured to store a data, wherein the memory row does not provide the data to the buffer in response to a request to read the data. The buffer is configured to store the data as a temporarily-stored data, wherein the buffer provides the temporarily-stored data in response to the request.