DRAM Buffer Phase Alignment Using Non-Volatile Control Words
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Solution Overview
Problem
Conventional registered buffers in DDR3 memory systems face challenges in maintaining phase alignment under varying ambient conditions, such as temperature and supply voltage, which can lead to transmission errors or system failure due to arbitrary initial training procedures.
Innovation Solution
An apparatus with a phase locked loop (PLL) and phase interpolator that stores a phase aligning control word determined during an initial training procedure under specific conditions, allowing for optimized phase alignment and flexible data eye opening, even under varying conditions, using non-volatile storage to maintain the control word for different operating frequencies and voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If arbitrary initial training procedures are used for phase alignment, then the apparatus can be quickly initialized, but phase alignment accuracy deteriorates under varying ambient conditions
Solution Approach 1:
The patent applies preliminary action by performing the training procedure during manufacturing to determine optimal phase aligning control words for different supply voltage levels and temperature ranges. These control words are stored in non-volatile memory before the apparatus is deployed, eliminating the need for arbitrary runtime training and ensuring accurate phase alignment under varying ambient conditions.
2Measurement precision
If phase aligning control words are determined during manufacturing training, then phase alignment accuracy improves, but device complexity increases
Solution Approach 1:
The training procedure is performed in advance during manufacturing rather than at runtime, transferring the complexity from operational phase to production phase. The non-volatile memory stores pre-computed control words, simplifying the runtime operation while maintaining high phase alignment accuracy across different operating conditions.
3Adaptability or versatility
If retraining is performed under varying ambient conditions, then adaptability improves, but system latency increases
Solution Approach 1:
The patent eliminates runtime retraining by performing all necessary training during manufacturing and storing the results in non-volatile memory. The apparatus can directly use the stored phase aligning control words under varying ambient conditions without incurring additional latency, as the adaptation has already been accomplished during production.
4Ease of manufacture
If arbitrary training conditions are used, then manufacturing process simplifies, but transmission reliability deteriorates
Solution Approach 1:
The patent specifies particular training conditions (supply voltage levels and temperature ranges) that represent typical operating scenarios. By training under these defined parameters during manufacturing, the apparatus achieves reliable phase alignment across the full operating range while maintaining a manageable manufacturing process that doesn't require arbitrary or excessive test conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution improves data eye opening without increasing propagation delay or system latency, allowing for flexible phase alignment adjustments and individualized timing parameters that fit specific apparatus characteristics, reducing the need for retraining and enhancing system reliability across different operating conditions.
Implementation Method 1
The apparatus comprises a phase locked loop (PLL), a phase interpolator for aligning a phase of an output clock signal
Data Source
AI summary
A apparatus is provided for buffering data between a memory controller and a DRAM. The apparatus includes a phase locked loop (PLL), a phase interpolator for aligning a phase of an output clock signal in response to a phase aligning control word, and a non-volatile storage location permanently storing the phase aligning control word. The phase aligning control word is determined through an initial training procedure of the device under predetermined training conditions of at least a supply voltage level and a temperature, and the predetermined training conditions are set so as to optimize the phase alignment of an edge of the output clock signal with respect to the buffered data signal.