DRAM Stacked Capacitor Bottom Electrode Collapse Prevention
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Solution Overview
Problem
The increased aspect ratios in advanced semiconductor manufacturing lead to collapse or deformation of bottom electrodes in stacked capacitors, resulting in insufficient capacitance in DRAM devices.
Innovation Solution
A method is introduced where a second lattice pattern on the top silicon nitride layer is offset from the first lattice pattern on the middle silicon nitride layer, guiding the lower portion of the cylinder-type capacitor bottom electrode in one direction and the upper portion in an opposite direction, using a combination of deposition and etching processes to prevent collapse and deformation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the aspect ratio of stacked capacitors is increased to reduce memory cell size, then integration density is improved, but the bottom electrode collapses or deforms leading to insufficient capacitance
Solution Approach 1:
The patent divides the bottom electrode into multiple segments by forming lattice patterns in intermediate layers. These lattice structures segment the continuous electrode material into controlled sections that can maintain shape independently, preventing collapse while preserving total capacitance area.
Solution Approach 2:
The patent applies different structural qualities to different parts of the capacitor. The intermediate layers containing lattice patterns provide localized structural support where needed, while the top and bottom electrodes maintain their capacitance-functioning surfaces. This local differentiation allows high aspect ratio without uniform structural compromise.
2Stability of the object's composition
If lattice patterns are formed in intermediate silicon nitride layers to prevent electrode collapse, then structural stability is improved, but capacitance decreases due to reduced effective area
Solution Approach 1:
The patent introduces intermediate silicon nitride layers with lattice patterns as mediator structures between the top and bottom electrodes. These intermediary layers provide mechanical support and shape control without directly participating in capacitance storage, thus separating the structural support function from the capacitance function.
Solution Approach 2:
The patent moves the lattice pattern formation from the traditional single-layer approach to a multi-layer intermediate structure. By distributing lattice patterns across multiple intermediate layers at different heights, the support function is achieved in three-dimensional space without compromising the two-dimensional capacitance area of the electrode surfaces.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces or eliminates the collapse and wobbling of bottom electrodes, maintaining capacitance and enabling high-density DRAM structures.
Implementation Method 1
sequentially depositing a first silicon nitride layer, a first silicon oxide layer and a second silicon nitride layer on the semiconductor substrate
Implementation Method 2
sequentially depositing a first silicon nitride layer, a first silicon oxide layer and a second silicon nitride layer on the semiconductor substrate
Implementation Method 3
forming a plurality of vias having sidewalls and bottoms vertically through the third silicon nitride layer, the second silicon oxide layer, the second silicon nitride layer, the first silicon oxide layer, and the first silicon nitride layer
Implementation Method 4
coating the sidewalls and the bottoms of the vias with a first titanium nitride layer
Data Source
AI summary
The present disclosure provides a method for fabricating DRAM devices with cylinder-type stacked capacitors. By utilizing offsetting of a first lattice pattern on a second silicon nitride layer (i.e., a middle silicon nitride layer) and a second lattice pattern on a third silicon nitride layer (i.e., a top silicon nitride layer), a collapse or deformation phenomenon of bottom electrodes of stacked capacitors can be reduced or eliminated. The wobbling phenomenon of bottom electrodes of stacked capacitors can be significantly reduced.