DRAM Data Flipping for Error Probability Reduction

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Solution Overview

Problem

Dynamic random access memory (DRAM) experiences high error probabilities due to electric charge leakage, leading to frequent refresh operations that increase power consumption and system bandwidth usage.

Innovation Solution

A memory access method that determines whether to flip data based on the quantities of '1' and '0' in the data and the storage mode of the DRAM, reducing the number of storage cells with high electric charges by flipping data when necessary, thereby reducing error probabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the refresh time interval is reduced to handle high error probability, then data reliability is improved, but power consumption increases and system bandwidth is occupied

Engineering Contradiction:
Improvedata error probabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by differentiating refresh operations based on row characteristics. Instead of uniformly refreshing all rows at fixed intervals, the system identifies rows with high error probability (worst cells) and applies targeted refresh operations only to those specific rows. This selective approach reduces overall power consumption while maintaining data reliability for critical rows.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements dynamic refresh intervals by adjusting the refresh time interval based on detected error probabilities. The system monitors data errors in real-time and adapts the refresh frequency dynamically - increasing refresh rate for rows showing high error rates and reducing it for stable rows. This dynamic adaptation optimizes both reliability and power consumption.

Inventive Principle:
Principle #15Dynamics

2Reliability

If the refresh time interval is reduced to handle high error probability, then data reliability is improved, but system bandwidth is occupied

Engineering Contradiction:
Improvedata error probabilityVSAvoidsystem bandwidth
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by differentiating refresh operations based on row characteristics. Instead of uniformly refreshing all rows at fixed intervals, the system identifies rows with high error probability (worst cells) and applies targeted refresh operations only to those specific rows. This selective approach reduces overall power consumption while maintaining data reliability for critical rows.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements dynamic refresh intervals by adjusting the refresh time interval based on detected error probabilities. The system monitors data errors in real-time and adapts the refresh frequency dynamically - increasing refresh rate for rows showing high error rates and reducing it for stable rows. This dynamic adaptation optimizes both reliability and power consumption.

Inventive Principle:
Principle #15Dynamics

3Device complexity

If data is stored without flipping, then storage simplicity is maintained, but error probability increases due to high electric charges in storage cells

Engineering Contradiction:
Improvestorage operation simplicityVSAvoiddata error probability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing data flipping before storage when the data contains a high proportion of '1' bits. The system analyzes the data pattern beforehand and proactively inverts the data to reduce the number of storage cells that would hold high electric charges. This preventive measure reduces error probability before the data is even written to memory, maintaining storage simplicity while improving reliability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11521674B2Memory access technology and computer system for reducing data error probability
Publication Date: 2022.12.06 HUAWEI TECH CO LTD
  • US11521674B2 patent drawing
  • US11521674B2 patent drawing
  • US11521674B2 patent drawing

AI summary

A memory access method and a computer system are provided. According to the memory access method, whether to flip the to-be-stored data for storage may be determined based on quantities of “1” and “0” in data to be written into a dynamic random access memory (DRAM) and a storage mode of the DRAM, to reduce a quantity of storage cells with high electric charges in the DRAM, thereby reducing a data error probability.