DRAM ECC Scrub During Refresh Cycles
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Solution Overview
Problem
Conventional DRAMs can detect and correct errors during read operations but fail to write corrected data back into the memory array, leading to uncorrectable errors over time, especially in systems powered continuously for long periods.
Innovation Solution
Implementing an ECC scrub method that reads existing data, corrects errors using ECC bits, and writes the corrected data back to the memory array during refresh or self-refresh cycles, ensuring ongoing data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC is implemented externally by widening the data-bus to accommodate checksum bits, then data integrity is improved, but device complexity and cost increase
Solution Approach 1:
The patent embeds ECC functionality directly within the DRAM device structure, nesting the error correction capability inside the memory array rather than adding external ECC channels. This allows ECC operations to be performed using the existing memory array resources, avoiding the need to widen external data-buses while maintaining data integrity protection.
Solution Approach 2:
The patent uses the DRAM sense amplifiers and row decoders as intermediary components to perform ECC operations. These existing circuit elements serve dual purposes: normal memory access and ECC correction, eliminating the need for separate external ECC hardware and reducing overall system complexity.
2Measurement precision
If ECC correction is performed only during read operations, then detection capability is improved, but long-term reliability deteriorates due to error accumulation
Solution Approach 1:
The patent performs ECC correction proactively during refresh operations before errors can accumulate and cause system failures. By correcting errors during routine refresh cycles rather than waiting for read operations, the system prevents error accumulation and maintains long-term reliability while using existing refresh infrastructure.
Solution Approach 2:
The patent makes ECC correction a continuous process by integrating it with ongoing refresh operations. Instead of performing ECC correction only intermittently during read operations, the error correction function operates continuously during each refresh cycle, ensuring persistent protection against error accumulation over time.
3Duration of action of stationary object
If the memory array is refreshed continuously to maintain data, then operational continuity is improved, but error accumulation increases over time
Solution Approach 1:
The patent merges the refresh function and ECC correction function into a single integrated operation. During each refresh cycle, the memory array is both refreshed to maintain operational continuity and simultaneously corrected for errors. This combination eliminates the trade-off between continuous operation and error accumulation by making both goals achievable in the same operational cycle.
Solution Approach 2:
The patent implements a feedback mechanism where ECC correction results from refresh operations are used to update the memory array state. The correction information feeds back into the refresh process, ensuring that corrected data is written back during the same refresh cycle, thereby preventing error accumulation while maintaining continuous operation.
Data Source
AI summary
A method for updating a DRAM memory array is disclosed. The method comprises: a) transitioning the DRAM memory array from an idle state to a refresh state in accordance with a command from a memory controller; b) initiating a refresh on the DRAM memory array using DRAM internal control circuitry by activating a row of data into an associated sense amplifier buffer; and c) during the refresh, performing an ERR Correction Code (ECC) scrub operation of selected bits in the activated row of the DRAM memory array.