DRAM Refresh Rate Control via Local Temperature Sensing
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Solution Overview
Problem
Current memory modules with DRAM chips face increased power consumption and reduced bandwidth due to uniform refresh rates across all chips, despite varying temperatures, which limits cooling capacity and efficiency.
Innovation Solution
Implementing temperature sensors to monitor temperature gradients across the memory module, allowing for dynamic adjustment of refresh rates only for chips operating between 85° C and 95° C, thereby reducing power consumption and increasing bandwidth by optimizing refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If uniform refresh rates are applied to all memory chips, then reliability is maintained across the memory module, but power consumption increases and bandwidth decreases
Solution Approach 1:
The patent applies different refresh rates to different memory chips based on their individual temperature characteristics. Temperature sensors monitor each chip's temperature, and the memory controller adjusts refresh rates locally for each chip rather than uniformly across the entire module. This allows chips operating within acceptable temperature ranges to use lower refresh rates, reducing overall power consumption while maintaining data retention reliability for each specific chip.
2Reliability
If refresh rate is increased for all chips, then data retention reliability improves, but bandwidth and power efficiency deteriorate
Solution Approach 1:
The system implements localized refresh rate adjustment for individual memory chips based on their temperature sensor readings. Only chips experiencing overheating conditions increase their refresh rates, while other chips maintain normal or reduced refresh rates. This selective approach preserves data retention reliability for affected chips without unnecessarily reducing bandwidth for the entire memory module.
3Use of energy by moving object
If temperature monitoring and dynamic refresh rate adjustment is implemented, then power consumption and bandwidth are optimized, but device complexity increases
Solution Approach 1:
Each memory chip includes an integrated temperature sensor that automatically monitors its own temperature conditions. The memory controller receives these temperature readings and autonomously adjusts refresh rates for each chip without requiring external intervention or complex external monitoring systems. This self-service approach distributes the monitoring function across individual chips, reducing the need for complex external temperature sensing infrastructure.
Solution Approach 2:
The memory module is divided into independently monitored and controlled segments, with each memory chip having its own temperature sensor and refresh rate control. This segmentation allows the system to manage complexity at the chip level rather than requiring a monolithic control system, making the overall system more manageable and scalable.
Data Source
AI summary
Power consumption for refresh of memory devices on a memory module is reduced by each memory device on the memory module to one of a plurality of sub channels on the memory module. Each sub channel has a thermal sensor that monitors the temperature of the DRAM chips in the region. The refresh rate is increased only for the memory devices in the sub channel in which the memory devices operate above a predefined high temperature. This results in a reduction in power required by the memory module for refresh and an increase in the maximum bandwidth of the memory module.