DRAM Memory Test System Fuse Bank Chip ID Process History
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Solution Overview
Problem
In the production of dynamic random access memory (DRAM), there is a need for efficient retrieval of processing logs when DRAM devices fail tests, as existing methods are inefficient in translating raw test results into readable information.
Innovation Solution
A memory test system comprising a tester and a processor that performs final tests on packaged DRAM devices, reads read-only data from a fuse bank, and transforms it into a chip ID, allowing the processor to obtain the process history, batch number, manufacturing date, and die position, enabling the identification of inappropriate manufacturing processes and determining batch failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If raw test results are stored without transformation, then storage space is saved, but retrieval efficiency and readability deteriorate
Solution Approach 1:
The system performs preliminary transformation of raw test results into readable formats (chip ID, process history, batch number, manufacturing date, die position) and stores both the transformed data and its association with raw results. This preliminary action eliminates the need for real-time transformation during retrieval, thus improving both readability and retrieval efficiency.
Solution Approach 2:
The system introduces an intermediary transformation layer that converts raw binary test results into human-readable information. This intermediary layer includes generating chip IDs from fuse bank data, retrieving process histories, and organizing manufacturing information, making the raw data interpretable without losing the original information.
2Reliability
If detailed process history is stored for every device, then traceability is improved, but data storage requirements and system complexity increase
Solution Approach 1:
Instead of storing complete process history for every single device, the system creates a representative copy or reference to the process history associated with each device's unique identifier (chip ID). This copying approach maintains full traceability while reducing redundant data storage, as multiple devices from the same batch can reference the same process history record.
Solution Approach 2:
The system segments process history data by organizational units (batches, wafers, dies) rather than storing individual device histories separately. This segmentation allows efficient retrieval by grouping related information, reducing overall system complexity while maintaining complete traceability through hierarchical organization.
Data Source
AI summary
The present disclosure provides a memory test system, including a tester and a processor. The tester is configured to perform a final test to the memory device to obtain a test result, and read a read-only data of the packaged memory device. The processor is coupled to the tester, configured to perform a function to transform the read-only data to a chip ID of the packaged memory device when the memory device does not pass the final test according to the test result. When the packaged memory device does not pass the final test, the processor is further configured to obtain a process history of the packaged memory device according to the chip ID.