DRAM Self-Refresh Cycle Control via Cell Voltage Detection
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Solution Overview
Problem
Existing semiconductor memory devices, such as DRAM, face inefficiencies in self-refresh cycle control due to fixed refresh cycle durations that do not account for varying cell charging capacities and temperature changes, leading to suboptimal cell usage and increased current consumption.
Innovation Solution
A circuit and method that uses detectors to monitor the voltage of dummy cells, generating a self-refresh pulse based on detection signals to variably control the self-refresh cycle, allowing for adaptive refresh timing without additional temperature-sensing circuits, thereby optimizing cell voltage detection and refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed self-refresh cycle is used in DRAM, then the refresh operation can be performed regularly, but the cell capacity is not appropriately used and current consumption increases
Solution Approach 1:
The patent implements dynamic self-refresh cycle control by detecting the actual voltage level of dummy cells and adjusting the refresh cycle accordingly. Instead of using a fixed refresh cycle, the system varies the refresh timing based on real-time voltage detection, allowing the refresh operation to adapt to actual cell charging capacity and leakage characteristics, thereby optimizing energy consumption while maintaining data retention reliability
Solution Approach 2:
The patent changes the refresh cycle parameter dynamically based on detected voltage levels. When the voltage in dummy cells drops below a threshold, the system adjusts the refresh cycle timing to match the actual charge leakage rate, rather than operating with a predetermined fixed cycle. This parameter adaptation allows the system to use cell capacity more efficiently and reduce unnecessary refresh operations that consume current
2Adaptability or versatility
If a temperature-sensing circuit is added to adjust refresh cycle, then the refresh operation can be optimized for temperature changes, but the self-refresh circuit occupies additional area
Solution Approach 1:
The patent makes the dummy cells serve multiple functions: they act as both storage elements for data and as sensing elements for detecting voltage levels that indicate charge leakage and temperature effects. By this dual use, the system gains temperature adaptation capability without adding separate temperature-sensing circuits, thus avoiding additional area occupation while maintaining the ability to adjust refresh cycles based on thermal conditions
Solution Approach 2:
The system uses its own dummy cells to detect voltage levels and determine appropriate refresh timing, rather than relying on external temperature sensors. The dummy cells themselves provide the sensing function needed for temperature compensation, allowing the refresh control logic to adapt to thermal conditions using resources already present in the memory structure
3Loss of energy
If the refresh cycle is too long, then current consumption is reduced, but the voltage difference drops below the minimum sensing voltage
Solution Approach 1:
The patent implements a feedback mechanism where detectors continuously monitor the voltage level in dummy cells and provide this information to the refresh control logic. Based on this feedback, the system dynamically adjusts the refresh cycle timing to ensure that refresh operations occur before the voltage difference drops below the minimum sensing threshold, while maximizing the interval between refreshes to reduce current consumption
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables more efficient use of cell capacity by dynamically adjusting the self-refresh cycle, reducing power consumption and improving layout efficiency by directly detecting cell voltage and adapting to temperature-induced changes in charging capacity without additional circuitry.
Implementation Method 1
a dynamic random access memory or DRAM is a semiconductor memory device using one capacitor and one transistor as data storage unit or unit cell. A logic one bit or 'data' is saved in a DRAM as a charge in the capacitor.
Implementation Method 2
The detector may include a differential amplifier comparing a voltage in which the voltage at a storage node of the detection cell is dropped as low as the minimum sensing voltage with a cell plate voltage so as to output the detection signal
Data Source
AI summary
The present invention relates to a circuit and a method for controlling a self-refresh cycle of a dynamic random access memory or DRAM. A cell voltage is directly detected so that a self-refresh cycle can be variably controlled. Detectors each detecting whether or not a voltage charged into a capacitor of a detection cell drops to or below a reference voltage and outputs a detection signal. A pulse generator generates a self-refresh pulse while being linked with an enabled detection signal of the plurality of detectors. A self-refresh cycle can be variably controlled and set to be suitable for the charging capacity of a cell. The detection cell is adapted to the change of the charging capacity of the cell in accordance with a change in temperature.