DRAM Extension Pad Structure for Reliability
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Solution Overview
Problem
Current DRAM cells with recessed gate structures suffer from defects due to limitations in processing technologies, leading to performance and reliability issues.
Innovation Solution
A semiconductor device is designed with a specific extension pad structure, including first, second, and third extension pads, and a margin extension pad, where the length of the extension pads is extended by forming an additional block pattern, ensuring complete contours and improved electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If recessed gate structures are used in DRAM cells, then carrier channel length is extended and current leakage is reduced, but processing technology limitations cause defects and reliability issues
Solution Approach 1:
The extension pad structure is divided into multiple segments including first extension pads, second extension pads, third extension pads, and margin extension pads. Each segment serves a specific function in the formation process, allowing precise control over the final pad geometry and reducing processing defects.
Solution Approach 2:
The method performs preliminary actions by forming block patterns and performing first and second self-aligned reverse patterning processes before final pad formation. These preliminary steps establish precise geometric templates that guide subsequent processing, ensuring high manufacturing precision.
2Reliability
If extension pad length is extended to improve electrical connections, then device reliability is improved, but manufacturing complexity increases
Solution Approach 1:
Multiple extension pad segments (first, second, third, and margin extension pads) are merged to form a complete extension pad structure. This merging approach allows each segment to be formed with optimized geometry while achieving the overall function of extended electrical connections with complete contours.
Solution Approach 2:
The solution introduces a temporal dimension to the manufacturing process by using sequential self-aligned reverse patterning steps. This transforms a potentially complex single-step pad formation into a series of simpler, more controllable steps, each operating in a well-defined geometric dimension.
3Manufacturing precision
If self-aligned reverse patterning is used to form extension pads, then manufacturing precision is improved, but processing time and complexity increase
Solution Approach 1:
The method uses periodic action through repeated cycles of self-aligned reverse patterning. The first and second self-aligned reverse patterning processes are performed in sequence, with each cycle refining the geometry of the extension pads. This periodic approach achieves high precision through iteration rather than requiring a single complex step.
Solution Approach 2:
The self-aligned reverse patterning process is self-service in nature, where each patterning step automatically aligns with previous steps without requiring additional alignment operations. The process uses the previously formed structures as self-aligned references, eliminating the need for separate alignment procedures and reducing overall processing time.
Data Source
AI summary
A semiconductor device includes a substrate, plugs and a storage node pad structure. The storage node pad structure includes first, second and third extension pads and a margin extension pad. The first extension pads are separately arranged as an array and electrically connected with the plugs. The margin extension pad is disposed outside the first extension pads. The second and third extension pads are disposed between the margin extension pad and the plurality of first extension pads. Maximum distances to a nearest lateral side of the margin extension pad from an end of the second extension pad and from an end of the third extension pad are equal. Included angles between the lateral side of the margin extension pad and respective shorter sides of the second and third extension pads are both less than 90 degrees. Accordingly, the semiconductor device has improved device reliability.