DRAM Active Region Isolation via Segmented Groove Etching

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Solution Overview

Problem

The miniaturization of semiconductor devices, such as DRAMs, faces challenges in forming miniaturized island-shaped active regions due to inefficiencies in photolithography and dry etching, leading to rounded ends and reduced surface area, which increases contact resistance and degrades data retention characteristics.

Innovation Solution

The semiconductor device incorporates first and second isolation grooves in the semiconductor substrate, with the second groove dividing the active region into device formation regions, and includes gate grooves and insulating films to define diffusion regions, allowing for improved isolation and reduced junction leak current without the need for a reverse-biased dummy gate electrode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If photolithography and dry etching are used to form miniaturized active regions, then device miniaturization is achieved, but the active region ends become rounded and surface area decreases

Engineering Contradiction:
Improveactive region sizeVSAvoidactive region shape accuracy
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The invention divides the active region formation process into multiple stages: first forming a preliminary active region, then using anisotropic etching to precisely define the final active region boundaries. This segmentation allows the preliminary region to be formed with relaxed precision requirements while the final shape is accurately defined by the controlled etching process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention replaces the conventional photolithography-dry etching mechanism with an alternative approach using chemical vapor deposition to form oxide films followed by anisotropic etching. This substitution enables better control over the active region shape and reduces rounding effects by utilizing the directional nature of the etching process rather than relying solely on photolithographic patterning.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Volume of moving object

If the active region area is reduced due to rounded ends, then device miniaturization is achieved, but contact resistance increases

Engineering Contradiction:
Improveactive region sizeVSAvoidcontact resistance
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The invention performs preliminary formation of the active region followed by precise anisotropic etching to define the final boundaries. This preliminary action ensures that the active region is formed with sufficient area before the final shaping step, preventing contact resistance issues while still achieving miniaturization through the controlled etching process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention replaces the photolithography-based patterning with anisotropic etching to define active region boundaries. This substitution maintains larger active region areas by using directional etching to create sharp corners and precise boundaries without the rounding effects inherent in photolithography, thereby reducing contact resistance while achieving miniaturization.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9012983B2Semiconductor device and method of forming the same
Publication Date: 2015.04.21 LONGITUDE LICENSING LTD
  • US9012983B2 patent drawing
  • US9012983B2 patent drawing
  • US9012983B2 patent drawing

AI summary

A semiconductor device includes the following elements. A semiconductor substrate has a device formation region. The device formation region is defined by first and second device isolation regions which extend in first and second directions, respectively. The device formation region has a first gate groove which extends in the second direction. A first gate insulating film is disposed in a lower portion of the first gate groove. A first gate electrode is disposed on the first gate insulating film. The first gate electrode is disposed in the lower portion of the first gate groove. A buried insulating film is disposed over the first gate electrode. The buried insulating film is disposed in an upper portion of the first gate groove.