Drawn Copper Pillar Interconnects for Fine Pitch Semiconductor Packages
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional methods for creating conductive pathways in semiconductor packages, such as FO-WLPs, are expensive, time-consuming, and limit the achievement of fine pitches and high aspect ratios, leading to reduced board level reliability and increased manufacturing complexity.
Innovation Solution
The use of preformed conductive pillars with a core and one or two surrounding layers, where the core is made of drawn copper and the layers are composed of solder material, allowing for higher aspect ratios and finer pitches, thereby improving electrical and thermal conductivity and reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional techniques (holes filled with copper, through substrate via bars, copper plated material with mold encapsulation) are used to create conductive pathways, then the conductive pathways can be formed, but the process becomes expensive and time consuming
Solution Approach 1:
The conductive pillars are pre-formed before being integrated into the semiconductor package structure. This preliminary formation of conductive elements allows for more efficient subsequent assembly processes, reducing overall manufacturing time and cost while maintaining reliable conductive pathways
2Manufacturing precision
If conventional techniques are used to create conductive pathways, then the pathways can be formed, but it becomes difficult to achieve fine pitch (less than 0.4P to 0.2P) due to large copper footprint
Solution Approach 1:
The invention changes the physical parameters of the conductive element by using pre-formed pillars with controlled dimensions instead of traditional copper fills. This allows for significantly reduced footprint and enables fine pitch applications (less than 0.4P to 0.2P) that were not achievable with conventional techniques
3Shape
If conventional techniques are used, then conductive pathways can be formed, but larger aspect ratios (5 to 1 or larger height to width) cannot be achieved
Solution Approach 1:
The conductive pillars are pre-formed with the desired high aspect ratio geometry before integration into the package. This preliminary formation allows achieving aspect ratios of 5:1 or larger, which cannot be accomplished with conventional copper fill or plating techniques applied after substrate preparation
4Manufacturing precision
If conventional techniques are used, then conductive pathways can be formed, but closely spaced conductive pathways cannot be achieved due to smaller aspect ratios
Solution Approach 1:
By changing the shape parameter to use high aspect ratio pre-formed pillars instead of traditional low aspect ratio copper structures, the invention enables closely spaced conductive pathways to be achieved. The vertical orientation and compact footprint of the pillars allow for higher density interconnections
5Reliability
If electro plated copper is used, then conductive pathways can be formed, but the grain size is not as good for conduction as drawn copper
Solution Approach 1:
The invention changes the material formation method from electro-plating to using pre-formed drawn copper pillars. Drawn copper produces superior grain structure and electrical conductivity compared to electro-plated copper, as the drawing process creates a more favorable crystalline structure for electron transport
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of semiconductor packages with higher aspect ratios and finer pitches, enhancing board level reliability and reducing manufacturing complexity and costs, while maintaining better electrical and thermal conductivity.
Implementation Method 1
the core is made of drawn copper and the layers are composed of solder material, allowing for higher aspect ratios and finer pitches, thereby improving electrical and thermal conductivity
Implementation Method 2
the core is made of drawn copper and the layers are composed of solder material, allowing for higher aspect ratios and finer pitches, thereby improving electrical and thermal conductivity
Data Source
AI summary
A semiconductor package interconnect system may include a conductive pillar having a core, a first layer surrounding the core, and a second layer surrounding the first layer. The core may be composed of a drawn copper wire, the first layer may be composed of nickel, and the second layer may be composed of a solder. A method for manufacturing a semiconductor package with such a conductive pillar may include placing a plurality of conductive pillars on a substrate using a stencil process.