Design Rule Checking Algorithm Using Scan Line Topology Database
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Solution Overview
Problem
Conventional design rule checking (DRC) systems are inefficient and laborious, especially for analog, RF, and custom circuit designs, due to the complexity and number of design rules, leading to slow processing times and the need for extensive education and training to optimize performance.
Innovation Solution
A method that populates a layout topology database with corner information from physical shapes, allowing for real-time design rule checking by comparing database values to design rule data sets, using perpendicular scan lines to collect data and stop only at corner positions, reducing computational complexity and enabling rapid rule checking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional DRC systems use powerful two-dimensional geometry engines to check design rules, then measurement precision and rule checking accuracy are improved, but processing time and computational complexity increase significantly
Solution Approach 1:
The patent segments the layout checking process by introducing scan lines that divide the layout region into manageable sections. The geometry engine processes only the portions of shapes intersected by scan lines rather than entire shapes, significantly reducing computational complexity while maintaining checking accuracy.
Solution Approach 2:
The patent performs preliminary actions by pre-calculating shape intersections with scan lines and storing intersection points in data structures before actual DRC rule checking. This preparation work enables faster rule evaluation during the checking phase.
2Measurement precision
If conventional DRC systems perform multiple independent geometry operation sequences for each rule check, then measurement precision is improved, but productivity and processing speed deteriorate
Solution Approach 1:
The patent merges multiple independent geometry operation sequences into a unified processing framework. Scan line intersections are calculated once and reused across multiple rule checks, eliminating redundant computations and improving processing speed while maintaining accuracy.
Solution Approach 2:
The patent establishes continuity by maintaining intersection data structures throughout the checking process, allowing seamless transition between different rule evaluations without re-computing geometry intersections, thus sustaining processing efficiency.
3Measurement precision
If conventional DRC systems check individual rules over entire layout regions, then measurement precision is improved, but device complexity and computational requirements increase
Solution Approach 1:
The patent segments the layout region using scan lines, dividing it into smaller processing zones. This segmentation allows the geometry engine to focus computational resources on specific regions intersected by scan lines rather than processing the entire layout, reducing overall computational complexity.
Solution Approach 2:
The patent applies local quality by processing different regions of the layout with appropriate detail levels. Scan line intersections provide localized precision where needed, while regions not intersected by scan lines require less computational attention, optimizing the balance between accuracy and complexity.
Data Source
AI summary
Roughly described, a design rule data set includes rules on derived layers. The rules are checked by traversing the corners of physical shapes, and for each corner, populating a layout topology database with values gleaned from that corner location, including values involving derived layers. After the layout topology database is populated, the values are compared to values in the design rule data set to detect any design rule violations, including violations of design rules defined on derived layers. Violations are reported in real time during manual editing of the layout. Preferably corner traversal is performed using scan lines oriented perpendicularly to edge orientations, scanning in the direction of the edge orientations. Scans stop only at corner positions on physical layers, and populate the layout topology database with what information can be gleaned based on the current scan line, including information about derived layers. The scans need not reach corners simultaneously.