DRFM Logic Circuit for Memory Refresh Attack Identification

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Solution Overview

Problem

Existing memory devices face issues with increased information decay in nearby memory cells due to certain access patterns, which can be exacerbated by repeated refresh operations intended to mitigate this decay, leading to potential information loss.

Innovation Solution

Implement a DRFM logic circuit that compares DRFM aggressor addresses to prevent repeated refresh operations on the same memory cells by skipping redundant DRFM commands when the same address is detected, and instead performs targeted refresh operations on identified victim addresses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If repeated refresh operations are performed on memory cells to prevent information loss, then data integrity is improved, but information decay in nearby memory cells is exacerbated

Engineering Contradiction:
Improvedata integrityVSAvoidinformation decay
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent implements a feedback mechanism where the memory device monitors access patterns and identifies aggressor addresses that cause increased information decay in nearby memory cells. Based on this monitoring feedback, the system dynamically adjusts refresh operations to target victim cells without repeatedly refreshing aggressor cells, thereby resolving the contradiction between maintaining data integrity and preventing information decay.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies local quality by differentiating between aggressor memory cells and victim memory cells. Instead of uniform refresh operations across all memory cells, the system applies targeted refresh operations only to victim cells adjacent to aggressor cells. This localized approach prevents information decay in vulnerable cells while avoiding the harmful effect of repeated refreshes on aggressor cells.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If the memory device monitors access patterns to identify affected memory cells, then targeted refresh operations can be performed, but the monitoring process itself generates patterns that cause information decay

Engineering Contradiction:
Improvetargeted refresh precisionVSAvoidinformation decay
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent introduces an intermediary mechanism that decouples the monitoring function from the refresh execution. The memory device monitors access patterns and identifies aggressor addresses, but the refresh operations are triggered by external controllers rather than being generated internally by the monitoring process itself. This intermediary approach allows precise identification of victim cells while preventing the monitoring process from generating harmful access patterns.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If the controller monitors refresh addresses to prevent repeated refreshes, then resource efficiency is improved, but the complexity of the control system increases

Engineering Contradiction:
Improverefresh operation efficiencyVSAvoidcontrol system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements self-service by enabling the memory device to autonomously monitor its own access patterns and identify aggressor addresses. The memory device generates and provides these aggressor addresses to external controllers, eliminating the need for complex external monitoring systems. This self-monitoring capability improves refresh operation efficiency while keeping the control system relatively simple.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250111045A1Apparatuses and methods for direct refresh management attack identification
Publication Date: 2025.04.03 MICRON TECHNOLOGY INC
  • US20250111045A1 patent drawing
  • US20250111045A1 patent drawing
  • US20250111045A1 patent drawing

AI summary

Memory devices direct refresh management (DRFM) attack identification. A DRFM logic circuit receives DRFM aggressor address and compares it to a previous DRFM aggressor address. If there is not a match, then a DRFM operation is performed. If there is a match, then the DRFM operation may be skipped. This may prevent repeated DRFM operations from being performed on a same DRFM aggressor address.