Direct Refresh Management Sampling Protection for DRAM

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Solution Overview

Problem

Volatile memory devices, such as DRAM, face data decay issues due to varying rates of information loss across memory cells, exacerbated by certain access patterns that increase decay rates in nearby cells, necessitating targeted refresh operations to prevent information loss.

Innovation Solution

The implementation of a direct refresh management system that identifies aggressor rows, stores them in an aggressor register, and performs targeted refresh operations on victim rows, while preventing over-refreshing by using a DRFM address sampling command to temporarily prevent the DRFM address from being added to the aggressor register, thus avoiding over-refreshing and potential aggressor status.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory performs CBR operations by refreshing all wordlines in sequence, then all memory cells are refreshed at a standard rate, but this approach cannot account for increased decay rates caused by certain access patterns

Engineering Contradiction:
Improvedata retentionVSAvoidrefresh efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the refresh operation into two distinct modes: CBR (charge-based refresh) for standard wordlines and targeted refresh for specific victim wordlines. This segmentation allows the system to apply different refresh strategies to different memory regions based on their decay characteristics, improving both reliability and efficiency

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by applying targeted refresh operations specifically to victim wordlines that are adjacent to aggressor rows, while maintaining standard CBR operations for other wordlines. This localized approach ensures that only the affected memory cells receive enhanced refresh attention, optimizing resource utilization

Inventive Principle:
Principle #3Local quality

2Reliability

If the memory performs targeted refresh operations on victim rows adjacent to aggressor rows, then data loss is prevented in affected cells, but this may cause over-refreshing of already refreshed rows

Engineering Contradiction:
Improvedata integrityVSAvoidrefresh energy consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent implements feedback by monitoring the aggressor register and the current refresh operations. The system tracks which wordlines have been recently refreshed and uses this information to prevent redundant targeted refresh operations on the same victim wordlines, thereby reducing energy consumption while maintaining data integrity

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies partial action by performing targeted refresh operations only on the specific victim wordlines that are adjacent to aggressor rows, rather than refreshing all wordlines. This selective approach prevents unnecessary energy expenditure on already refreshed or unaffected memory regions

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If the memory identifies and refreshes victim rows based on aggressor row access patterns, then data decay is compensated for affected cells, but this increases the complexity of refresh control logic

Engineering Contradiction:
Improvedata retentionVSAvoidrefresh control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an aggressor register as an intermediary data structure that stores the addresses of recently accessed aggressor rows. This intermediary component simplifies the control logic by providing a centralized mechanism to track and manage aggressor patterns, making it easier to identify victim wordlines that require targeted refresh operations

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11996134B2Apparatuses, systems, and methods for direct refresh management sampling protection
Publication Date: 2024.05.28 MICRON TECHNOLOGY INC
  • US11996134B2 patent drawing
  • US11996134B2 patent drawing
  • US11996134B2 patent drawing

AI summary

Apparatuses, systems, and methods for direct refresh management (DRFM) sampling protection. A memory receives a DRFM address and DRFM sampling command from a controller. The memory also samples addresses into an aggressor register. Responsive to receiving the DRFM address, the memory may prevent addresses which match the DRFM address from being added to the aggressor register for at least a period of time. For example, a protect flag may be activated for the period of time. If the aggressor register already contained an address which matched the DRFM address, it may be removed.