Drift Gradient Semiconductor Structure for Cosmic Ray Burnout Resistance
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Solution Overview
Problem
Semiconductor devices face challenges in enhancing cosmic ray tolerance while maintaining breakdown voltage, particularly due to single event burnout (SEB) caused by cosmic rays, which can lead to fatal breakdowns despite low probability, and existing technologies struggle to balance electric field strength and cosmic ray resistance.
Innovation Solution
The semiconductor device incorporates a drift gradient region with a concentration profile where the impurity concentration is gradually lowered from the second main surface to the first main surface, forming an electric field distribution with a higher increase ratio on the second main surface, thereby reducing electric field strength on the first main surface and improving cosmic ray tolerance while maintaining breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the impurity concentration is uniformly distributed in the drift layer, then the manufacturing process is simple, but the cosmic ray tolerance is poor due to single event burnout
Solution Approach 1:
The drift layer is designed with non-uniform impurity concentration distribution, where the impurity concentration varies through the thickness of the drift layer. Specifically, the impurity concentration is higher near the drift region and lower near the ohmic contact region, creating local variations in electrical properties that suppress single event burnout while maintaining overall device functionality
Solution Approach 2:
The impurity concentration parameter is changed continuously or in steps through the drift layer thickness. By controlling the impurity concentration profile (gradual change or stepped change), the patent achieves suppression of single event burnout while managing the complexity of the manufacturing process through established semiconductor fabrication techniques
2Reliability
If the electric field strength is increased to maintain breakdown voltage, then the breakdown voltage is maintained, but the cosmic ray tolerance deteriorates due to increased susceptibility to single event burnout
Solution Approach 1:
Different regions of the drift layer are designed with different impurity concentrations to create localized electrical characteristics. The region near the drift region has higher impurity concentration to support breakdown voltage, while the region near the ohmic contact has lower impurity concentration to suppress single event burnout, achieving both requirements simultaneously
Solution Approach 2:
The impurity concentration profile is designed in advance during device fabrication to pre-establish conditions that suppress single event burnout. By controlling the impurity distribution before device operation, the patent creates inherent protection against cosmic ray effects while maintaining the necessary breakdown voltage characteristics
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses local overvoltage and overcurrent generation from cosmic rays, enhancing cosmic ray tolerance and reliability while maintaining the breakdown voltage, even in high-voltage and high-electric-field environments.
Implementation Method 1
forming an electric field distribution with a higher increase ratio on the second main surface, thereby reducing electric field strength on the first main surface
Data Source
AI summary
A semiconductor device includes a chip having a first main surface which serves as a device surface and a second main surface which serves as a non-device surface, and a first conductivity type drift gradient region formed in the chip, and having a concentration profile in which an impurity concentration of an end portion on the first main surface side is lower than an impurity concentration of an end portion on the second main surface side.