Drive Circuit Duty Cycle Control Under Common-Mode Voltage Shift
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Solution Overview
Problem
Clock signals transmitted between a controller and a drive circuit experience attenuation and impedance matching issues, leading to different input common-mode voltages that affect signal quality and functionality.
Innovation Solution
A drive circuit design incorporating an input stage, output stage, and duty cycle adjusting subcircuit to receive complementary signals, output common-mode signals, and adjust the duty cycle of output signals to maintain stability despite varying input common-mode voltages, ensuring the duty cycle tends to a preset value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If clock signals are transmitted through channels (PKG, Socket, slot) between controller and drive circuit, then the signals can be delivered to the drive circuit, but the signals experience attenuation and impedance matching issues causing different input common-mode voltages and signal quality degradation
Solution Approach 1:
The patent introduces a common-mode voltage detection mechanism and compensation circuit as an intermediary between the transmission channel and the drive circuit. This intermediary detects the common-mode voltage level and adjusts the signal accordingly, compensating for the harmful effects of attenuation and impedance mismatches in the transmission channel.
Solution Approach 2:
The patent implements a feedback mechanism where the common-mode voltage is detected and used to adjust the drive circuit operation. The detection of common-mode voltage differences feeds back to the signal processing stage, allowing real-time compensation to maintain signal quality despite transmission losses.
2Adaptability or versatility
If different input common-mode voltages are present at the drive circuit input, then the drive circuit can operate with varying input conditions, but the output signals experience significant changes affecting functionality
Solution Approach 1:
The patent uses feedback by detecting the common-mode voltage level and using this information to adjust the drive circuit output. The detected common-mode voltage feeds back to the differential-to-single-ended conversion stage, allowing the circuit to adapt to varying input conditions while maintaining stable output signals.
Solution Approach 2:
The patent changes the operating parameters of the drive circuit based on the detected common-mode voltage level. By adjusting conversion ratios, gain settings, or reference voltages according to the common-mode level, the circuit maintains reliable output performance across different input conditions.
3Reliability
If a duty cycle adjusting subcircuit is added to stabilize the output duty cycle, then the output performance is improved, but the device complexity increases
Solution Approach 1:
The duty cycle adjustment is achieved through an intermediary control mechanism that uses the common-mode voltage detection result to modulate the output signal. This intermediary control stage adjusts pulse widths or duty cycles based on the detected common-mode level without requiring complete redesign of the entire drive circuit.
Solution Approach 2:
The common-mode voltage detection mechanism serves multiple functions: it compensates for transmission losses, adjusts output duty cycle, and maintains signal integrity. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby limiting the increase in overall device complexity.
Data Source
AI summary
A drive circuit includes: an input stage configured to receive a first input signal and a second input signal, and to output a first output signal and a common-mode output signal, where the first input signal and the second input signal are complementary signals; an output stage configured to receive the first output signal, and to output a second output signal; and a duty cycle adjusting subcircuit configured to determine the first output signal and the common-mode output signal or a signal obtained by inverting the common-mode output signal as a control signal, and to adjust a duty cycle of the second output signal. The drive circuit determines the common-mode output signal or the signal obtained by inverting the common-mode output signal as the control signal of the duty cycle adjusting subcircuit, and adjusts the duty cycle of the second output signal to tend to a preset value.


