Drive Control Circuit for Power Semiconductor Hard-Short-Circuit Detection
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Solution Overview
Problem
Existing drive control circuits for power semiconductor elements, such as IGBTs and MOSFETs, face challenges in accurately and cost-effectively detecting hard-switching faults, including long detection times, increased device size and cost, and potential misdetection due to complex detection methods.
Innovation Solution
A drive control circuit incorporating a driver, detector, delay signal generator, subtractor, and short-circuit state detector that uses a single electrical quantity to generate a difference signal, allowing for immediate and accurate detection of hard-switching faults by comparing the peak value of this signal to a reference value, eliminating the need for combined time conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If collector-emitter voltage detection is used to detect hard-switching faults, then detection accuracy is improved, but detection time increases and cost increases due to requiring high voltage diodes
Solution Approach 1:
The invention extracts the detection function from the collector-emitter voltage path and relocates it to the gate-emitter voltage path. By detecting the gate-emitter voltage during the mirror period, the system achieves fault detection without requiring high voltage diodes and with reduced detection time, as the gate-emitter voltage is already available in the drive circuit.
Solution Approach 2:
The gate-emitter voltage serves as an intermediary parameter that indirectly reflects the collector-emitter voltage status during the mirror period. Instead of directly measuring the collector-emitter voltage, the circuit uses the gate-emitter voltage as a mediator to infer fault conditions, avoiding the need for expensive high voltage detection components.
2Measurement precision
If both collector current and gate-emitter voltage are detected to identify hard-switching faults, then detection accuracy is improved, but device size and cost increase
Solution Approach 1:
The gate-emitter voltage detection circuit serves multiple functions: it monitors the mirror period characteristics for fault detection and also provides information about the switching state. By making this single measurement multi-functional, the system eliminates the need for separate collector current and gate-emitter voltage detection circuits, reducing device size and complexity.
Solution Approach 2:
The invention merges the fault detection function with the existing gate drive circuit by utilizing the gate-emitter voltage that is already being monitored for normal operation. This consolidation eliminates redundant detection circuits and reduces overall device complexity while maintaining detection accuracy.
3Measurement precision
If detection period is set based on mirror period characteristics, then detection accuracy is improved, but system adaptability decreases due to fixed timing requirements
Solution Approach 1:
The detection system dynamically adapts to different operating conditions by using the actual mirror period characteristics observed in real-time. Rather than relying on fixed predetermined timing, the system identifies the mirror period onset and duration dynamically, allowing it to accommodate variations in switching conditions, temperature, and device parameters while maintaining detection accuracy.
Data Source
AI summary
A voltage driver shifts a voltage on a gate as a control terminal of a power semiconductor element in response to an ON command or an OFF command. A gate voltage detector generates a detection signal of a gate-emitter voltage. A delay signal generator generates a delay signal obtained by adding a delay time to the detection signal. A subtractor generates a voltage difference signal between the detection signal and the delay signal. When the voltage difference signal exceeds a reference voltage during an operation of turning on the power semiconductor element, a short-circuit state detector detects a hard-switching fault.