Drive Control Device Parallel Signal Timing

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Solution Overview

Problem

In game machines, the increasing number of controllable objects and drive control devices leads to longer information acquisition cycles for the performance CPU, potentially delaying abnormality detection and increasing the risk of breakdowns due to limited CPU terminals and the need for repeated polling signals.

Innovation Solution

A drive control system where multiple drive control devices are connected in parallel to a common signal line, allowing the upper-level control device to transmit a single information acquisition request signal, and each drive control device determines its response transmission timing to avoid overlap, enabling simultaneous information acquisition from all devices without repeating requests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of information

If the performance CPU uses a polling system to individually output information acquirement request signals to each drive control device, then the performance CPU can acquire information from all drive control devices, but the cycle time for acquiring information increases as the number of drive control devices increases

Engineering Contradiction:
Improveinformation acquisition completenessVSAvoidinformation acquisition cycle time
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The patent merges the information acquisition process by allowing multiple drive control devices to transmit their response signals simultaneously on a shared communication bus. Instead of sequentially polling each device individually, the system combines multiple information requests into a single operation, enabling parallel information transmission from all drive control devices to the performance CPU in one cycle.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Each drive control device determines its transmission timing in advance based on predetermined transmission sequence information. This preliminary timing arrangement ensures that response signals from multiple devices are transmitted without temporal overlap, allowing the performance CPU to receive information from all devices simultaneously without requiring repeated polling operations.

Inventive Principle:
Principle #10Preliminary action

2Loss of information

If the performance CPU repeats transmission of information acquirement request signals multiple times, then the performance CPU can acquire information from all drive control devices, but the timing for abnormality detection becomes delayed

Engineering Contradiction:
Improveinformation acquisition completenessVSAvoidabnormality detection timing
Core Design Contradiction:
Loss of informationVSReliability

Solution Approach 1:

The patent combines multiple information acquisition operations into a single simultaneous transmission cycle. By allowing all drive control devices to transmit their response signals at the same time based on predetermined timing sequences, the performance CPU receives complete information from all devices in one operation, eliminating the delays associated with repeated sequential polling and enabling timely abnormality detection.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If multiple drive control devices are connected in parallel to the performance CPU, then the system can control more controllable objects, but the limited number of CPU terminals creates signal collision risks

Engineering Contradiction:
Improvenumber of controllable objectsVSAvoidsignal transmission complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Each drive control device is assigned predetermined transmission sequence information that determines its transmission timing in advance. This preliminary timing assignment allows multiple devices to share the communication bus without signal collision, as each device knows when it should transmit its response signal relative to others, enabling parallel connectivity without requiring additional terminal isolation mechanisms.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9672683B2Drive control device and drive control system
Publication Date: 2017.06.06 OMRON CORP
  • US9672683B2 patent drawing
  • US9672683B2 patent drawing
  • US9672683B2 patent drawing

AI summary

A drive control system has: a plurality of drive control devices; and an upper-level control device to which each of the drive control devices is connected in parallel with each other via a common signal line. The upper-level control device transmits a common information acquirement request signal to each of the drive control devices. Upon receiving the information acquirement request signal, each of the drive control devices determines transmission start timing for a response signal based on transmission sequence information indicating its transmission sequence and a length of the response signal such that the response signal does not temporally overlap with a response signal being transmitted from another drive control device to the upper-level control device. Each of the drive control devices transmits the response signal to the upper-level control device via the signal line at its transmission starting timing.